THS1030_13 Datasheet, PDF (2/39 Pages) Texas Instruments – 3-V TO 5.5-V, 10-BIT, 30MSPS CMOS ANALOG-TO-DIGITAL CONVERTER

THS1030
3ĆV TO 5.5ĆV, 10ĆBIT, 30 MSPS
CMOS ANALOGĆTOĆDIGITAL CONVERTER
SLAS243E − NOVEMBER 1999 − REVISED DECEMBER 2003
functional block diagram
AIN
REFTS
REFBS
MODE
REFTF
REFBF
VBG
ORG
Sample
and
Hold
A ^Internal
Reference
B Buffer
GND
Core
10
ADC
Output
Buffer
I/O(0−9)
OVR
OE
Timing
Circuit
REFSENSE
VREF
STBY
CLK
Terminal Functions
TERMINAL
NAME
NO.
AGND
1, 19
AIN
27
AVDD
28
CLK
15
DGND
14
DVDD
2
I/O0
3
I/O1
4
I/O2
5
I/O3
6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
I/O8
11
I/O9
12
MODE
23
OE
16
OVR
13
REFBS
25
REFBF
24
REFSENSE
18
REFTF
22
REFTS
21
STBY
17
VREF
26
876M
20
I/O
DESCRIPTION
I
Analog ground
I
Analog input
I
Analog supply
I
Clock input
I
Digital ground
I
Digital driver supply
Digital I/O bit 0 (LSB)
Digital I/O bit 1
Digital I/O bit 2
Digital I/O bit 3
O
Digital I/O bit 4
Digital I/O bit 5
Digital I/O bit 6
Digital I/O bit 7
Digital I/O bit 8
Digital I/O bit 9 (MSB)
I
Mode input
I
High to 3-state the data bus, low to enable the data bus
O Out-of-range indicator
I
Reference bottom sense
I
Reference bottom decoupling
I
Reference sense
I
Reference top decoupling
I
Reference top sense
I
High = power-down mode, low = normal operation mode
I/O Internal and external reference
I
High = THS1030 mode, low = TLC876 mode (see section 4 for TLC876 mode)
2
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