THS1030_13 Datasheet, PDF (13/39 Pages) Texas Instruments – 3-V TO 5.5-V, 10-BIT, 30MSPS CMOS ANALOG-TO-DIGITAL CONVERTER

THS1030
3ĆV TO 5.5ĆV, 10ĆBIT, 30 MSPS
CMOS ANALOGĆTOĆDIGITAL CONVERTER
SLAS243E − NOVEMBER 1999 − REVISED DECEMBER 2003
PRINCIPLES OF OPERATION
sample and hold
The analog input signal A_IN is applied to the AIN pin, either dc-coupled or ac-coupled.
The differential sample and hold processes A_IN with respect to the voltages applied to the REFTS and REFBS
pins, to give a differential output VP⁺ − VP^− = VP given by:
VP + AIN * VM
Where:
VM
+
(REFTS
)
2
REFBS)
(1)
For single-ended input signals, VM is a constant voltage; usually the AIN mid-scale input voltage. However if
MODE = AV_DD/2 then REFTS and REFBS can be connected together to operate with AIN as a complementary
pair of differential inputs (see Figures 16 and 17).
analog-to-digital converter
In all operating configurations, VP is digitized against ADC reference voltages REFTF and REFBF, full-scale
values of VP being given by:
VPFS
)+
)
(REFTF *
2
REFBF)
(2)
VPFS
*+
*
(REFTF *
2
REFBF)
VP voltages outside the range VPFS− to VPFS+ lie outside the conversion range of the ADC. Attempts to
convert out-of-range inputs are signaled to the application by driving the OVR output pin high. VP voltages less
than VPFS− give ADC output code 0. VP voltages greater than VPFS+ give output code 1023.
complete system
Combining the above equations, the analog full scale input voltages at AIN which give VPFS+ and VPFS− at
the sample and hold output are:
AIN
+
FS
)+
VM
)
(REFTF
*
2
REFBF)
(3)
and
AIN
+
FS
*+
VM
*
(REFTF
*
2
REFBF)
(4)
The analog input span (voltage range) that lies within the ADC conversion range is:
Input span + [(FS )) * (FS *)] + (REFTF * REFBF)
(5)
The REFTF and REFBF voltage difference sets the device input range. The next sections describe in detail the
various methods available for setting voltages REFTF and REFBF to obtain the desired input span and ADC
performance.
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