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| TMS320DM6435_17 Datasheet, PDF (193/252 Pages) Texas Instruments – Digital Media Processor | |||
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www.ti.com
TMS320DM6435
Digital Media Processor
SPRS344C â NOVEMBER 2006 â REVISED JUNE 2008
Table 6-45. Switching Characteristics for I2C Timings(1) (see Figure 6-26)
-7/-6/-5/-4
-L/-Q6/-Q5/-Q4
NO.
PARAMETER
STANDARD
MODE
FAST MODE
UNIT
MIN MAX
MIN MAX
16
tc(SCL)
Cycle time, SCL
10
17
td(SCLH-SDAL)
Delay time, SCL high to SDA low (for a repeated START
condition)
4.7
2.5
µs
0.6
µs
18
td(SDAL-SCLL)
Delay time, SDA low to SCL low (for a START and a repeated
START condition)
4
0.6
µs
19
tw(SCLL)
Pulse duration, SCL low
20
tw(SCLH)
Pulse duration, SCL high
21 td(SDAV-SCLH) Delay time, SDA valid to SCL high
22 tv(SCLL-SDAV) Valid time, SDA valid after SCL low
23
tw(SDAH)
Pulse duration, SDA high between STOP and START
conditions
24
tr(SDA)
Rise time, SDA
25
tr(SCL)
Rise time, SCL
26
tf(SDA)
Fall time, SDA
27
tf(SCL)
Fall time, SCL
28 td(SCLH-SDAH) Delay time, SCL high to SDA high (for STOP condition)
29 Cp
Capacitance for each I2C pin
4.7
1.3
4
0.6
250
100
0
0
4.7
1.3
1000
1000
300
300
20 + 0.1Cb(1)
20 + 0.1Cb(1)
20 + 0.1Cb(1)
20 + 0.1Cb(1)
4
0.6
10
µs
µs
ns
0.9 µs
µs
300 ns
300 ns
300 ns
300 ns
µs
10 pF
(1) Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed.
26
24
SDA
23
21
19
28
25
20
SCL
16
27
18
22
17
18
Stop Start
Repeated
Start
Stop
Figure 6-26. I2C Transmit Timings
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Peripheral Information and Electrical Specifications 193
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