TMS320DM6435_17 Datasheet, PDF (104/252 Pages) Texas Instruments – Digital Media Processor

TMS320DM6435
Digital Media Processor
SPRS344C – NOVEMBER 2006 – REVISED JUNE 2008
www.ti.com
Table 3-33 and Table 3-34 provide a different view of the Serial Port Block. Table 3-33 shows the Serial
Port Sub-Block 0 function based on PINMUX1.SPBK0 setting. Table 3-34 shows the Serial Port Sub-Block
1 function based on PINMUX1.SPBK1 setting. These selection options are also shown pictorially in
Figure 3-11.
PINMUX1.SPBK0
00
01
10
11
Table 3-33. Serial Port Sub-Block 0 Function Selection
BLOCK FUNCTION
GPIO (6) (default)
McBSP0
McASP0 Receive, 3 Serializers
Reserved
RESULTING PIN FUNCTIONS
GPIO: GP[104:99]
McBSP0: CLKX0, FSX0, DX0, CLKR0, FSR0, DR0
McASP0: ACLKR0, AFSR0, AHCLKR0, AXR0[3],
AXR0[2], AXR0[1]
Reserved
Table 3-34. Serial Port Sub-Block 1 Function Selection
PINMUX1.SPBK1
BLOCK FUNCTION
RESULTING PIN FUNCTIONS
00
GPIO (6) (default)
GPIO: GP[110:105]
01
Reserved
–
10
McASP0 Transmit with 1 Serializer and
Mute Control
McASP0: AXR0[0], ACLKX0, AFSX0, AHCLKX0,
AMUTEIN0⁽¹⁾, AMUTE0
11
Reserved
–
(1) The input from the AMUTEIN0/GP[109] pin is connected to both the McASP0 and GPIO.
In addition, the VDD3P3V_PWDN.SP field determines the power state of the Serial Port Block pins. The
Serial Port Block pins default to powered down and not operational. To use these pins, user must first
program VDD3P3V_PWDN.SP = 0 to power up the pins. For more details on the VDD3P3V_PWDN.SP
field, see Section 3.2, Power Considerations.
To facilitate McASP0 operation, the input from the AMUTEIN0/GP[109] pin is connected to both the
McASP0 and the GPIO module. Therefore when an external mute event occurs, in addition to notifying the
McASP0, it can also cause an interrupt through the GPIO module.
104 Device Configuration
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