LM3S1636_13 Datasheet, PDF (173/655 Pages) Texas Instruments – Stellaris Microcontroller

OBSOLENTREN:DT:I Nhaost rdeicsocomnmtiennudeeddpfroordnuecwtiodneosifgtnhsis. device.
Stellaris^® LM3S1636 Microcontroller
■ Source of clocks in sleep and deep-sleep modes
■ System clock derived from PLL or other clock source
■ Enabling/disabling of oscillators and PLL
■ Clock divisors
■ Crystal input selection
Figure 5-5 on page 174 shows the logic for the main clock tree. The peripheral blocks are driven by
the system clock signal and can be individually enabled/disabled. The ADC clock signal is
automatically divided down to 16 MHz for proper ADC operation. The PWM clock signal is a
synchronous divide of the system clock to provide the PWM circuit with more range (set with PWMDIV
in RCC).
Note: When the ADC module is in operation, the system clock must be at least 16 MHz.
July 24, 2012
173
Texas Instruments-Production Data