LM3S1636_13 Datasheet, PDF (12/655 Pages) Texas Instruments – Stellaris Microcontroller

Table of Contents
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List of Tables
Table 1.
Table 2.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 4-1.
Table 4-2.
Table 4-3.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 6-1.
Table 6-2.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Table 8-5.
Table 8-6.
Table 9-1.
Revision History .................................................................................................. 23
Documentation Conventions ................................................................................ 30
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 53
Processor Register Map ....................................................................................... 54
PSR Register Combinations ................................................................................. 59
Memory Map ....................................................................................................... 67
Memory Access Behavior ..................................................................................... 69
SRAM Memory Bit-Banding Regions .................................................................... 71
Peripheral Memory Bit-Banding Regions ............................................................... 72
Exception Types .................................................................................................. 77
Interrupts ............................................................................................................ 78
Exception Return Behavior ................................................................................... 83
Faults ................................................................................................................. 84
Fault Status and Fault Address Registers .............................................................. 85
Cortex-M3 Instruction Summary ........................................................................... 87
Core Peripheral Register Regions ......................................................................... 90
Memory Attributes Summary ................................................................................ 93
TEX, S, C, and B Bit Field Encoding ..................................................................... 96
Cache Policy for Memory Attribute Encoding ......................................................... 97
AP Bit Field Encoding .......................................................................................... 97
Memory Region Attributes for Stellaris Microcontrollers .......................................... 97
Peripherals Register Map ..................................................................................... 98
Interrupt Priority Levels ...................................................................................... 123
Example SIZE Field Values ................................................................................ 151
JTAG_SWD_SWO Signals (100LQFP) ................................................................ 155
JTAG Port Pins Reset State ............................................................................... 156
JTAG Instruction Register Commands ................................................................. 162
System Control & Clocks Signals (100LQFP) ...................................................... 166
Reset Sources ................................................................................................... 167
Clock Source Options ........................................................................................ 172
Possible System Clock Frequencies Using the SYSDIV Field ............................... 175
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 175
System Control Register Map ............................................................................. 179
RCC2 Fields that Override RCC fields ................................................................. 194
Hibernate Signals (100LQFP) ............................................................................. 234
Hibernation Module Register Map ....................................................................... 240
Flash Protection Policy Combinations ................................................................. 255
User-Programmable Flash Memory Resident Registers ....................................... 258
Flash Register Map ............................................................................................ 258
GPIO Pins With Non-Zero Reset Values .............................................................. 281
GPIO Pins and Alternate Functions (100LQFP) ................................................... 281
GPIO Signals (100LQFP) ................................................................................... 282
GPIO Pad Configuration Examples ..................................................................... 288
GPIO Interrupt Configuration Example ................................................................ 288
GPIO Register Map ........................................................................................... 290
Available CCP Pins ............................................................................................ 327
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July 24, 2012
Texas Instruments-Production Data