DS92LV1021_14 Datasheet, PDF (14/23 Pages) Texas Instruments – 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer

DS92LV1021, DS92LV1210
SNLS024C – MARCH 1999 – REVISED APRIL 2013
www.ti.com
RECOVERING FROM LOCK LOSS
In the case where the Serializer loses lock during data transmission up to 5 cycles of data that was previously
received can be invalid. This is due to the delay in the lock detection circuit. The lock detect circuit requires that
invalid clock information be received 4 times in a row to indicate loss of lock. Since clock information has been
lost it is possible that data was also lost during these cycles. When the Deserializer LOCK pin goes low, data
from at least the previous 5 cycles should be resent upon regaining lock.
Lock can be regained at the Deserializer by causing the Serializer to resend SYNC patterns as described above.
PCB CONSIDERATIONS
The Bus LVDS devices Serializer and Deserializer should be placed as close to the edge connector as possible.
In multiple Deserializer applications, the distance from the Deserializer to the slot connector appears as a stub to
the Serializer driving the backplane traces. Longer stubs lower the impedance of the bus increasing the load on
the Serializer and lowers threshold margin at the Deserializers. Deserializer devices should be placed no more
than 1 inch from the slot connector.
TRANSMISSION MEDIA
The Serializer and Deserializer are designed for data transmission over a multi-drop bus. Multi-drop buses use a
single Serializer and multiple Deserializer devices. Since the Serializer can be driving from any point on the bus,
the bus must be terminated at both ends. For example, a 100 Ohm differential bus must be terminated at each
end with 100 Ohms lowering the DC impedance that the Serializer must drive to 50 Ohms. This load is further
lowered by the addition of multiple Deserializers. Adding up to 20 Deserializers to the bus (depending upon
spacing) will lower the total load to about 27 Ohms (54 Ohm bus). The Serializer is designed for DC loads
between 27 and 100 Ohms.
The Serializer and Deserializer can also be used in point-to-point configuration of a backplane, PCB trace or
through a twisted pair cable. In point-to-point configurations the transmission media need only be terminated at
the receiver end. In the point-to-point configuration the potential of offsetting the ground levels of the Serializer
vs. the Deserializer must be considered. Bus LVDS provides a plus / minus one volt common mode range at the
receiver inputs.
Pin Diagrams
Figure 17. DS92LV1021 Serializer DB Package
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