AM3517_12 Datasheet, PDF (131/222 Pages) Texas Instruments – ARM Microprocessors

AM3517, AM3505
www.ti.com
Microprocessor
sdrc_d0
SPRS550D – OCTOBER 2009 – REVISED MARCH 2012
LPDDR
T _DQ0
sdrc_d7
sdrc_dm0
sdrc_dqs0
sdrc_d8
T _DQ7
T _DM0
T _DQS0
T _DQ8
sdrc_d15
sdrc_dm1
sdrc_dqs1
sdrc_d16
T _DQ15
T _DM1
T _DQS1
T _DQ16
sdrc_d23
sdrc_dm2
sdrc_dqs2
sdrc_d24
T _DQ23
T _DM2
T _DQS2
T _DQ24
sdrc_d31
sdrc_dm3
sdrc_dqs3
sdrc_ba0 ^T
sdrc_ba1 ^T
sdrc_a0 ^T
T _DQ31
T _DM3
T _DQS3
BA0
BA1
A0
sdrc_a14
sdrc_ncs0
sdrc_ncs1
sdrc_ncas
sdrc_nras
sdrc_nwe
sdrc_cke0
sdrc_cke1
sdrc_clk
sdrc_nclk
T
T
N/C
T
T
T
T
N/C
T
T
A14
CS
CAS
RAS
WE
CKE
CK
CK
Figure 6-18. AM3517/05 LPDDR High Level Schematic (x32 memory)
6.4.2.1.2 Compatible JEDEC LPDDR Devices
Table 6-13 shows the parameters of the JEDEC LPDDR devices that are compatible with this interface.
Generally, the LPDDR interface is compatible with x16 and x32 LPDDR333 speed grade LPDDR devices.
Table 6-13. Compatible JEDEC LPDDR Devices
NO.
PARAMETER
MIN
MAX
UNIT
NOTES
1
JEDEC LPDDR Device Speed
Grade
LPDDR333
See Note ⁽¹⁾
2
JEDEC LPDDR Device Bit Width
16
3
JEDEC LPDDR Device Count
1
32
Bits
2
Devices
See Note ⁽²⁾
4
JEDEC LPDDR Device Ball
Count
60
90
Balls
(1) Higher LPDDR speed grades operating at the specified speeds are supported due to inherent JEDEC LPDDR backwards compatibility.
(2) 1 x16 LPDDR device is used for 16 bit LPDDR memory system. 1x32 or 2x16 LPDDR devices are used for a 32-bit LPDDR memory
system.
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Timing Requirements and Switching Characteristics 131
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