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CC2564MODN Datasheet, PDF (11/62 Pages) Texas Instruments – Bluetooth Host Controller Interface (HCI) Module
www.ti.com
CC2564MODN, CC2564MODA
SWRS160D – FEBRUARY 2014 – REVISED DECEMBER 2015
4.7.1.4 I/O States in Various Power Modes
CAUTION
Some device I/Os are not fail-safe (see Section 3.2, Pin Attributes). Fail-safe
means that the pins do not draw current from an external voltage applied to the
pin when I/O power is not supplied to the device. External voltages are not
allowed on these I/O pins when the I/O supply voltage is not supplied because
of possible damage to the device.
Table 4-2 lists the I/O states in various power modes.
Table 4-2. I/O States in Various Power Modes
I/O NAME
SHUT DOWN(1)
I/O State
Pull
DEFAULT ACTIVE(1)
I/O State
Pull
HCI_RX
Z
PU
I
PU
HCI_TX
Z
PU
O-H
HCI_RTS
Z
PU
O-H
HCI_CTS
Z
PU
I
PU
AUD_CLK
Z
PD
I
PD
AUD_FSYNC
Z
PD
I
PD
AUD_IN
Z
PD
I
PD
AUD_OUT
Z
PD
Z
PD
TX_DBG
Z
PU
O
(1) I = input, O = output, Z = Hi-Z, — = no pull, PU = pullup, PD = pulldown, H = high, L = low
DEEP SLEEP(1)
I/O State
Pull
I
PU
O
O
I
PU
I
PD
I
PD
I
PD
Z
PD
4.7.1.5 nSHUTD Requirements
Operation mode level (1)
Shutdown mode level (1)
PARAMETER
Minimum time for nSHUT_DOWN low to reset the device
SYM
VIH
VIL
MIN
1.42
0
5
Rise and fall times
tr and tf
(1) An internal 300-kΩ pulldown retains shut-down mode when no external signal is applied to this pin.
4.7.2 Clock Specifications
4.7.2.1 Slow Clock Requirements
MAX
1.98
0.4
20
UNIT
V
V
ms
μs
CHARACTERISTICS
Input slow clock frequency
Input slow clock accuracy
(Initial + temp + aging)
Input transition time tr and tf
(10% to 90%)
Frequency input duty cycle
Slow clock input voltage limits
Input impedance
Input capacitance
CONDITION
Bluetooth
ANT
SYM
tr and tf
Square wave, DC-coupled VIH
VIL
MIN
15%
0.65 × VDD_IO
0
1
TYP
32768
50%
MAX
±250
±50
UNIT
Hz
ppm
200 ns
85%
VDD_IO
0.35 × VDD_IO
5
V peak
V peak
MΩ
pF
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Specifications
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