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CC2640R2F Datasheet, PDF (10/64 Pages) Texas Instruments – SimpleLink Bluetooth low energy Wireless MCU
CC2640R2F
SWRS204 – DECEMBER 2016
www.ti.com
4.4 Signal Descriptions – RHB Package
Table 4-2. Signal Descriptions – RHB Package
NAME
DCDC_SW
DCOUPL
NO.
TYPE
DESCRIPTION
17
Power
Output from internal DC-DC(1)
12
Power
1.27-V regulated digital-supply decoupling(2)
DIO_0
6
Digital I/O
GPIO, Sensor Controller
DIO_1
7
Digital I/O
GPIO, Sensor Controller
DIO_2
8
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_3
9
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_4
10
Digital I/O
GPIO, Sensor Controller, high-drive capability
DIO_5
15
Digital I/O
GPIO, High drive capability, JTAG_TDO
DIO_6
16
Digital I/O
GPIO, High drive capability, JTAG_TDI
DIO_7
20
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_8
21
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_9
22
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_10
23
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_11
24
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_12
25
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_13
26
Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_14
27
Digital/Analog I/O GPIO, Sensor Controller, Analog
JTAG_TMSC
13
Digital I/O
JTAG TMSC, high-drive capability
JTAG_TCKC
14
Digital I/O
JTAG TCKC
RESET_N
19
Digital input Reset, active-low. No internal pullup.
RF_N
2
RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P
1
RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RX_TX
VDDR
VDDR_RF
VDDS
VDDS2
3
RF I/O
Optional bias pin for the RF LNA
29
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(3)(2)
32
Power
1.7-V to 1.95-V supply, typically connect to output of internal DC-DC(2)(4)
28
Power
1.8-V to 3.8-V main chip supply(1)
11
Power
1.8-V to 3.8-V GPIO supply(1)
VDDS_DCDC
18
Power
1.8-V to 3.8-V DC-DC supply
X32K_Q1
4
Analog I/O
32-kHz crystal oscillator pin 1
X32K_Q2
5
Analog I/O
32-kHz crystal oscillator pin 2
X24M_N
30
Analog I/O
24-MHz crystal oscillator pin 1
X24M_P
31
Analog I/O
24-MHz crystal oscillator pin 2
EGP
Power
Ground – Exposed Ground Pad
(1) See technical reference manual (listed in Section 8.3) for more details.
(2) Do not supply external circuitry from this pin.
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
10
Terminal Configuration and Functions
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