TMS320VC5502 Datasheet, PDF (94/189 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5502
Fixed-Point Digital Signal Processor
SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004
www.ti.com
3.12.2.7 Parallel GPIO Enable Register 2 (PGPIOEN2)
15
14
Reserved
R/W, 00
13
IO45EN
R/W, 0
12
IO44EN
R/W, 0
11
IO43EN
R/W, 0
10
IO42EN
R/W, 0
9
IO41EN
R/W, 0
7
IO39EN
6
IO38EN
5
IO37EN
R/W, 0
R/W, 0
R/W, 0
LEGEND: R = Read, W = Write, n = value at reset
4
IO36EN
R/W, 0
3
IO35EN
R/W, 0
2
IO34EN
R/W, 0
1
IO33EN
R/W, 0
Figure 3-40. Parallel GPIO Enable Register 2 Layout (0x4406)
8
IO40EN
R/W, 0
0
IO32EN
R/W, 0
BIT NAME
Reserved
IOxEN
Table 3-43. Parallel GPIO Enable Register 2 Bit Field Description⁽¹⁾
BIT NO.
15-14
13-0
ACCESS
R/W
R/W
RESET VALUE
DESCRIPTION
00
Reserved
00000000000000
Enable or disable GPIO function of the corresponding I/O pins. See
Table 3-36, TMS320VC5502 PGPIO Cross-Reference.
• IOxEN = 0:
GPIO function of corresponding signal is disabled, i.e., the pin
goes into a high-impedance state.
• IOxEN = 1:
GPIO function of corresponding signal is enabled, i.e., the signal
supports its GPIO function.
(1) x = value from 32 to 45
3.12.2.8 Parallel GPIO Direction Register 2 (PGPIODIR2)
15
14
Reserved
R/W, 00
13
IO45DIR
R/W, 0
12
IO44DIR
R/W, 0
11
IO43DIR
R/W, 0
10
IO42DIR
R/W, 0
9
IO41DIR
R/W, 0
7
IO39DIR
6
IO38DIR
5
IO37DIR
R/W, 0
R/W, 0
R/W, 0
LEGEND: R = Read, W = Write, n = value at reset
4
IO36DIR
R/W, 0
3
IO35DIR
R/W, 0
2
IO34DIR
R/W, 0
1
IO33DIR
R/W, 0
Figure 3-41. Parallel GPIO Direction Register 2 Layout (0x4407)
8
IO40DIR
R/W, 0
0
IO32DIR
R/W, 0
Table 3-44. Parallel GPIO Direction Register 2 Bit Field Description⁽¹⁾
BIT NAME
Reserved
IOxDIR
BIT NO.
15-14
13-0
(1) x = value from 32 to 45
94
Functional Overview
ACCESS
R/W
R/W
RESET VALUE
DESCRIPTION
00
Reserved
00000000000000
Data direction bits that configure corresponding I/O pins either as
inputs or outputs. See Table 3-36, TMS320VC5502 PGPIO
Cross-Reference.
• IOxDIR = 0: Configure corresponding pin as an input.
• IOxDIR = 1: Configure corresponding pin as an output.