TMS320VC5502 Datasheet, PDF (137/189 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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TMS320VC5502
Fixed-Point Digital Signal Processor
SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004
ECLKOUT1
EMIF.CEx
EMIF.BE[3:0]
EMIF.A[21:2]
EMIF.D[31:0]
EMIF.AOE/SOE/SDRAS
(see Note A)
EMIF.ARE/SADS/SDCAS/SRE
(see Note A)
EMIF.AWE/SWE/SDWE
(see Note A)
EMIF.ARDY
Setup = 2
Strobe = 3
Not Ready
A1
A1
BE
A1
Address
A1
A5
A6
Read Data
A7
A6
Hold = 2
A2
A2
A2
A3
A4
A2
A5
A7
A. EMIF.AOE/SOE/SDRAS, EMIF.ARE/SADS/SDCAS/SRE, and EMIF.AWE/SWE/SDWE operate as EMIF.AOE (identified under select signals),
EMIF.ARE, and EMIF.AWE, respectively, during asynchronous memory accesses.
Figure 5-8. Asynchronous Memory Read Timings
Specifications 137