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TMS320VC5502 Datasheet, PDF (132/189 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
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TMS320VC5502
Fixed-Point Digital Signal Processor
SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004
www.ti.com
5.6.3 Clock Generation in Bypass Mode (APLL Disabled)
Table 5-2 and Table 5-3 assume testing over recommended operating conditions and H = 0.5tc(CO) (see
Figure 5-3).
Table 5-2. CLKIN in Bypass Mode Timing Requirements
VC5502-200
VC5502-300
NO.
UNIT
MIN MAX
MIN MAX
C7 tc(CI)
Cycle time, CLKIN(1)
APLL Synthesis Disabled
20
(2)
20
(2) ns
C8 tf(CI)
Fall time, CLKIN
10
10 ns
C9 tr(CI)
Rise time, CLKIN
10
10 ns
C10 tw(CIL) Pulse duration, CLKIN low
0.4 * tc(CI)
0.4 * tc(CI)
ns
C11 tw(CIH) Pulse duration, CLKIN high
0.4 * tc(CI)
0.4 * tc(CI)
ns
(1) If an external crystal is used, the X2/CLKIN cycle time is limited by the crystal frequency range listed in Table 5-1.
(2) This device utilizes a fully static design and therefore can operate with tc(CI) approaching ∞. The device is characterized at frequencies
approaching 0 Hz.
Table 5-3. CLKOUT in Bypass Mode Switching Characteristics
NO.
PARAMETER
VC5502-200
VC5502-300
UNIT
MIN
TYP
MAX
C1 tc(CO)
Cycle time, CLKOUT
20 K * tc(CI) (1)
(2) ns
C3 tf(CO)
Fall time, CLKOUT
3 ns
C4 tr(CO)
Rise time, CLKOUT
3 ns
C5 tw(COL)
Pulse duration, CLKOUT low
K * tc(CI) /2 – 1
K * tc(CI) /2 + 1 ns
C6 tw(COH)
Pulse duration, CLKOUT high
K * tc(CI) /2 – 1
K * tc(CI) /2 + 1 ns
(1) K = divider ratio between CPU clock and system clock selected as CLKOUT. For example, when SYSCLK1 is selected as CLKOUT and
SYSCLK1 is set to the CPU clock divided by four, use K = 4.
(2) This device utilizes a fully static design and therefore can operate with tc(CI) approaching ∞. The device is characterized at frequencies
approaching 0 Hz.
C7
CLKIN
C9
C10
C11
C8
C1
CLKOUT
C3
C4
C6
C5
(A ) The relationship of CLKIN to CLKOUT depends on the system clock selected to drive CLKOUT. The waveform relationship
shown in this figure is intended to illustrate the timing parameters only and may differ based on configuration.
Figure 5-3. Bypass Mode Clock Timings
132 Specifications
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