AM1705_1004 Datasheet, PDF (67/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

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SDRAM Size
64M bits
128M bits
256M bits
512M bits
AM1705
SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010
EMIFB
EMB_CS
EMB_CAS
EMB_RAS
EMB_WE
EMB_CLK
EMB_SDCKE
EMB_BA[1:0]
EMB_A[12:0]
EMB_WE_DQM[0]
EMB_WE_DQM[1]
EMB_D[15:0]
EMB_WE_DQM[2]
EMB_WE_DQM[3]
EMB_D[31:16]
SDRAM
4M x 16 x 4
Bank
CE
CAS
RAS
WE
CLK
CKE
BA[1:0]
A[12:0]
LDQM
UDQM
DQ[15:0]
SDRAM
4M x 16 x 4
Bank
CE
CAS
RAS
WE
CLK
CKE
BA[1:0]
A[12:0]
LDQM
UDQM
DQ[15:0]
Figure 6-18. EMIFB to Dual 4M × 16 × 4 bank SDRAM Interface
Table 6-22. Example of 16-bit EMIFB Address Pin Connections
Width
×16
×16
×16
×16
Banks
4
4
4
4
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
SDRAM
EMIFB
Address Pins
A[11:0]
EMB_A[11:0]
A[11:0]
EMB_A[11:0]
A[12:0]
EMB_A[12:0]
A[12:0]
EMB_A[12:0]
Table 6-23 is a list of the EMIFB registers.
BYTE ADDRESS
0xB000 0000
0xB000 0008
0xB000 000C
0xB000 0010
0xB000 0014
0xB000 001C
0xB000 0020
Table 6-23. EMIFB Controller Registers
ACRONYM
MIDR
SDCFG
SDRFC
SDTIM1
SDTIM2
SDCFG2
BPRIO
REGISTER DESCRIPTION
Module ID Register
SDRAM Configuration Register
SDRAM Refresh Control Register
SDRAM Timing Register 1
SDRAM Timing Register 2
SDRAM Configuration 2 Register
Peripheral Bus Burst Priority Register
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
67
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