AM1705_1004 Datasheet, PDF (19/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
www.ti.com
SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010
3.6.5 Serial Peripheral Interface Modules (SPI0, SPI1)
Table 3-7. Serial Peripheral Interface (SPI) Terminal Functions
SIGNAL NAME
PIN NO
PTP
TYPE ⁽¹⁾
PULL ⁽²⁾
MUXED
DESCRIPTION
SPI0
SPI0_SCS[0] /UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
9
I/O
IPU
UART0, EQEP0B,
GPIO, BOOT
SPI0 chip select.
SPI0_ENA /UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
12
I/O
IPU
UART0, EQEP0A,
GPIO, BOOT
SPI0 enable.
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
11
I/O
IPD eQEP1, GPIO, BOOT SPI0 clock.
SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
SPI0 data
18
I/O
IPD
slave-in-master-
out.
eQEP0, GPIO, BOOT
SPI0 data
17
I/O
IPD
slave-out-master-
in.
SPI1
SPI1_SCS[0] /UART2_TXD/GP5[13]
SPI1_ENA /UART2_RXD/GP5[12]
8
I/O
IPU
SPI1 chip select.
UART2, GPIO
7
I/O
IPU
SPI1 enable.
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
16
I/O
IPD eQEP1, GPIO, BOOT SPI1 clock.
SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]
SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]
SPI1 data
14
I/O
IPU
slave-in-master-
I2C1, GPIO, BOOT
out.
SPI1 data
13
I/O
IPU
slave-out-master-
in.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
Copyright © 2010, Texas Instruments Incorporated
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