OMAP3530 Datasheet, PDF (56/230 Pages) Texas Instruments – Applications Processor

OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-2. Ball Characteristics (CUS Pkg.)⁽¹⁾ (continued)
BALL
BOTTOM
[1]
PIN
NAME [3]
MODE
[4]
hsusb1_tll_
6
data6
AD9
etk_d7
0
mcspi3_cs1 1
mmc3_dat7 2
hsusb1_
3
data3
gpio_21
4
mm1_txen_ 5
n
hsusb1_tll_
6
data3
AC4
etk_d8
0
sys_drm_
1
msecure
mmc3_dat6 2
hsusb1_dir
3
gpio_22
4
hsusb1_tll_
6
dir
AD5
etk_d9
0
sys_secure_ 1
indicator
mmc3_dat5 2
hsusb1_nxt 3
gpio_23
4
mm1_rxdm
5
hsusb1_tll_
6
nxt
AC3
etk_d10
0
uart1_rx
2
hsusb2_clk
3
gpio_24
4
hsusb2_tll_c 6
lk
AC9
etk_d11
0
hsusb2_stp 3
gpio_25
4
mm2_rxdp
5
hsusb2_tll_s 6
tp
AC10
etk_d12
0
hsusb2_dir
3
gpio_26
4
hsusb2_tll_
6
dir
TYPE
[5]
IO
O
O
IO
IO
IO
IO
IO
O
O
IO
I
IO
O
O
O
IO
I
IO
IO
O
O
I
O
IO
O
O
O
IO
IO
I
O
I
IO
O
BALL
RESET
STATE
[6]
L
L
L
L
L
L
BALL
RESET
REL.
STATE
[7]
L
L
L
L
L
L
RESET
REL.
MODE
[8]
4
4
4
4
4
4
POWER [9]
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
HYS
[10]
Yes
Yes
Yes
Yes
Yes
Yes
BUFFER
STRENGTH
(mA) [11]
4
4
4
4
4
4
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PULL
U/D
TYPE
[12]
IO
CELL [13]
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
PU/ PD LVCMOS
56
TERMINAL DESCRIPTION
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