OMAP3530 Datasheet, PDF (17/230 Pages) Texas Instruments – Applications Processor

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)⁽¹⁾ (continued)
BALL
BOTTOM
[1]
U3
H1
M8
L8
K8
J8
D28
D26
D27
E27
AG22
AH22
AG23
BALL
PIN
TOP NAME [3]
[2]
safe_mode
NA gpmc_nbe1
gpio_61
safe_mode
AB10 gpmc_nwp
gpio_62
safe_mode
AB12 gpmc_wait0
AC10
NA
NA
NA
NA
NA
NA
NA
gpmc_wait1
gpio_63
safe_mode
gpmc_wait2
gpio_64
safe_mode
gpmc_wait3
sys_
ndmareq1
gpio_65
safe_mode
dss_pclk
gpio_66
safe_mode
dss_hsync
gpio_67
safe_mode
dss_vsync
gpio_68
safe_mode
dss_acbias
gpio_69
safe_mode
dss_data0
uart1_cts
gpio_70
safe_mode
NA dss_data1
uart1_rts
gpio_71
safe_mode
NA dss_data2
gpio_72
safe_mode
MODE
[4]
7
0
4
7
0
4
7
0
0
4
7
0
4
7
0
1
4
7
0
4
7
0
4
7
0
4
7
0
4
7
0
2
4
7
0
2
4
7
0
4
7
TYPE
[5]
O
IO
O
IO
I
I
IO
I
IO
I
I
IO
O
IO
O
IO
O
IO
O
IO
IO
I
IO
IO
O
IO
IO
IO
BALL
RESET
STATE
[6]
BALL
RESET
REL.
STATE
[7]
RESET
REL.
MODE
[8]
POWER [9]
HYS
[10]
L
L
7 VDDS_ MEM Yes
L
0
0 VDDS_ MEM Yes
H
H
0 VDDS_ MEM Yes
H
H
7 VDDS_ MEM Yes
H
H
7 VDDS_ MEM Yes
H
H
7 VDDS_ MEM Yes
H
H
7
VDDS
Yes
H
H
7
VDDS
Yes
H
H
7
VDDS
Yes
L
L
7
VDDS
Yes
L
L
7
VDDS
No
L
L
7
VDDS
No
L
L
7
VDDS
No
BUFFER
STRENGTH
(mA) [11]
4
4
NA
4
4
4
4
4
4
8
4
4
4
PULL
U/D
TYPE
[12]
IO
CELL [13]
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVDS/
PD CMOS
PU/ LVDS/
PD CMOS
PU/ LVDS/
PD CMOS
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