OMAP3530 Datasheet, PDF (19/230 Pages) Texas Instruments – Applications Processor

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)⁽¹⁾ (continued)
BALL
BOTTOM
[1]
AA28
AA27
G25
H27
H26
H25
E28
J26
AC27
BALL
PIN
TOP NAME [3]
[2]
NA dss_data14
gpio_84
safe_mode
NA dss_data15
gpio_85
safe_mode
NA dss_data16
gpio_86
safe_mode
NA dss_data17
gpio_87
safe_mode
NA dss_data18
mcspi3_clk
dss_data0
gpio_88
safe_mode
NA dss_data19
mcspi3_
simo
dss_data1
gpio_89
safe_mode
NA dss_data20
mcspi3_
somi
dss_data2
gpio_90
safe_mode
NA dss_data21
mcspi3_cs0
dss_data3
gpio_91
safe_mode
NA dss_data22
mcspi3_cs1
dss_data4
gpio_92
safe_mode
MODE
[4]
0
4
7
0
4
7
0
4
7
0
4
7
0
2
3
4
7
0
2
3
4
7
0
2
3
4
7
0
2
3
4
7
0
2
3
4
7
TYPE
[5]
IO
BALL
RESET
STATE
[6]
L
BALL
RESET
REL.
STATE
[7]
L
RESET
REL.
MODE
[8]
7
IO
IO
L
L
7
IO
IO
L
L
7
IO
IO
L
L
7
IO
IO
L
L
7
IO
IO
IO
IO
L
L
7
IO
IO
IO
O
H
H
7
IO
IO
IO
O
L
L
7
IO
IO
IO
O
L
L
7
O
IO
IO
POWER [9]
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
HYS
[10]
NA
NA
Yes
Yes
Yes
Yes
Yes
Yes
NA
BUFFER
STRENGTH
(mA) [11]
4
4
8
8
8
8
4
8
4
PULL
U/D
TYPE
[12]
IO
CELL [13]
PU/ LVDS/
PD CMOS
PU/ LVDS/
PD CMOS
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVCMOS
PD
PU/ LVDS/
PD CMOS
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