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MSP430F2619S-HT Datasheet, PDF (51/90 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F2619S-HT
www.ti.com
SLAS697B – MARCH 2010 – REVISED JUNE 2011
Timer_A – Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
fTA
Timer_A clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK,
External: TACLK, INCLK,
Duty cycle = 50% ±10%
VCC
MIN
2.2 V
3V
tTA,cap Timer_A, capture timing
TA0, TA1, TA2
2.2 V/3 V
20
MAX
10
16
UNIT
MHz
ns
Timer_B – Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
fTB
Timer_B clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK,
External: TBCLK,
Duty Cycle = 50% ±10%
VCC
MIN
2.2 V
3V
tTB,cap Timer_B, capture timing
TB0, TB1, TB2
2.2 V/3 V
20
MAX
10
16
UNIT
MHz
ns
USCI (UART Mode) – Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
fUSCI
PARAMETER
USCI input clock frequency
TEST CONDITIONS
Internal: SMCLK, ACLK,
External: UCLK;
Duty cycle = 50% ±10%
VCC
MIN TYP MAX
fSYSTEM
fBITCLK
BITCLK clock frequency
(equals baud rate in MBaud)
2.2 V/3 V
1
tτ
UART receive deglitch time(1)
2.2 V
3V
50 150
600
50 150
600
UNIT
MHz
MHz
ns
(1) Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized, their width should exceed the maximum specification of the deglitch time.
USCI (SPI Master Mode) – Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1) (see Figure 28
and Figure 29)
fUSCI
PARAMETER
USCI input clock frequency
TEST CONDITIONS
SMCLK, ACLK,
Duty cycle = 50% ±10%
VCC
MIN
MAX UNIT
fSYSTEM MHz
tSU,MI
SOMI input data setup time
2.2 V
110
ns
3V
75
tHD,MI
SOMI input data hold time
2.2 V
0
ns
3V
0
tVALID,MO
SIMO output data valid time
UCLK edge to SIMO valid,
CL = 20 pF
2.2 V
3V
30
ns
20
(1) fUCxCLK = 1/2tLO/HI with tLO/HI ≥ max(tVALID,MO(USCI) + tSU,SI(Slave), tSU,MI(USCI) + tVALID,SO(Slave)).
For the slave parameters tSU,SI(Slave) and tVALID,SO(Slave), see the SPI parameters of the attached slave.
Copyright © 2010–2011, Texas Instruments Incorporated
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