MSP430F2619S-HT Datasheet, PDF (49/90 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F2619S-HT
www.ti.com
SLAS697B – MARCH 2010 – REVISED JUNE 2011
Crystal Oscillator (XT2) – Electrical Characteristics⁽¹⁾
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
f_XT2
XT2 oscillator crystal frequency,
mode 0
TEST CONDITIONS
XT2Sx = 0
V_CC
1.8 V to 3.6 V
MIN TYP MAX UNIT
0.4
0.9 MHz
f_XT2
XT2 oscillator lcrystal frequency,
mode 1
XT2Sx = 1
1.8 V to 3.6 V
1
4 MHz
f_XT2
XT2 oscillator crystal frequency,
mode 2
XT2Sx = 2
1.8 V to 3.6 V
2
2.2 V to 3.6 V
2
3 V to 3.6 V
2
10
12 MHz
16
f_XT2
XT2 oscillator logic-level
square-wave input frequency,
XT2Sx = 3
1.8 V to 3.6 V
0.4
2.2 V to 3.6 V
0.4
3 V to 3.6 V
0.4
10
12 MHz
16
OA
C_L,eff
Oscillation allowance
(see Figure 26 and Figure 27)
Integrated effective load capacitance,
HF mode⁽²⁾
XT2Sx = 0, f_XT2 = 1 MHz;
C_L,eff = 15 pF
XT2Sx = 1, f_XT2 = 4MHz;
C_L,eff = 15 pF
XT2Sx = 2, f_{XT1, HF} = 16
MHz;
C_L,eff = 15 pF
See ⁽³⁾
2700
800
Ω
300
1
pF
Duty Cycle HF mode
f_Fault
Oscillator fault frequency, HF mode⁽⁴⁾
Measured at P1.4/SMCLK,
f_XT2 = 10 MHz
Measured at P1.4/SMCLK,
f_XT2 = 16 MHz
XT2Sx = 3⁽⁵⁾
2.2 V/3 V
2.2 V/3 V
40
50
60
%
40
50
60
30
300 kHz
(1) To improve EMI on the LFXT1 oscillator the following guidelines should be observed:
(a) Keep as short of a trace as possible between the device and the crystal.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
(g) Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other documentation. This
signal is no longer required for the serial programming adapter.
(2) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Since the PCB adds additional capacitance it is
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup the effective load capacitance should
always match the specification of the used crystal.
(3) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
(4) Frequencies below the MIN specification set the fault flag, frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(5) Measured with logic-level input frequency, but also applies to operation with crystals.
Copyright © 2010–2011, Texas Instruments Incorporated
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