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TL16C550D_09 Datasheet, PDF (4/54 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550D, TL16C550DI
SLLS597E – APRIL 2004 – REVISED DECEMBER 2008 .................................................................................................................................................. www.ti.com
Enabling Autoflow Control and Auto-CTS
Autoflow control is enabled by setting modem control register bits 5 (autoflow enable or AFE) and 1 (RTS) to a 1.
Autoflow incorporates both auto-RTS and auto-CTS. When only auto-CTS is desired, bit 1 in the modem control
register must be cleared (this assumes that a control signal is driving CTS).
Auto-CTS and Auto-RTS Functional Timing
A. When CTS is low, the transmitter keeps sending serial data out.
B. If CTS goes high before the middle of the last stop bit of the current byte, the transmitter finishes sending the current
byte but it does not send the next byte.
C. When CTS goes from high to low, the transmitter begins sending data again.
Figure 2. CTS Functional Timing Waveforms
The receiver FIFO trigger level can be set to 1, 4, 8, or 14 bytes. These are described in Figure 3 and Figure 4.
A. N = RCV FIFO trigger level (1, 4, or 8 bytes)
B. The two blocks in dashed lines cover the case where an additional byte is sent as described in the preceding
auto-RTS section.
Figure 3. RTS Functional Timing Waveforms, RCV FIFO Trigger Level = 1, 4, or 8 Bytes
Byte 18
A. RTS is deasserted when the receiver receives the first data bit of the sixteenth byte. The receive FIFO is full after
finishing the sixteenth byte.
B. RTS is asserted again when there is at least one byte of space available and no incoming byte is in processing or
there is more than one byte of space available.
C. When the receive FIFO is full, the first receive buffer register read reasserts RTS.
Figure 4. RTS Functional Timing Waveforms, RCV FIFO Trigger Level = 14 Bytes
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