TL16C550D_09 Datasheet, PDF (21/54 Pages) Texas Instruments – ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL

TL16C550D, TL16C550DI
www.ti.com .................................................................................................................................................. SLLS597E – APRIL 2004 – REVISED DECEMBER 2008
PARAMETER MEASUREMENT INFORMATION (continued)
RCLK
Sample Clock
TL16C450 Mode:
SIN
Start
8 CLKs
Data Bits 5- 8
Parity
t_d12
Stop
Sample Clock
INTRPT
(data ready)
INTRPT
(RCV error)
RD1, RD2^‡
(read RBR)
50%
5500%%
t_d13
50%
t_d14
50%
50% _Active
RD1, RD2^‡
(read LSR)
50%
Active
t_d14
A. The RD2 signal is applicable only to the PT and PFB packages.
Figure 8. Receiver Timing Waveforms
Copyright © 2004–2008, Texas Instruments Incorporated
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