OMAP-L137_15 Datasheet, PDF (4/222 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor

OMAP-L137
SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014
www.ti.com
1.4
Functional Block Diagram
Input
Clock(s)
JTAG Interface
System Control
PLL/Clock
Generator
w/OSC
General-
Purpose
Timer
General-
Purpose
Timer
(Watchdog)
Memory
Protection
Power/Sleep
Controller
RTC/
32-kHz
OSC
Pin
Multiplexing
ARM Subsystem
ARM926EJ-S CPU
With MMU
4KB ETB
16KB 16KB
I-Cache D-Cache
8KB RAM
(Vector Table)
64KB ROM
DSP Subsystem
C674x
DSP CPU
AET
32KB 32KB
L1 Pgm L1 RAM
256KB L2 RAM
BOOT ROM
Switched Central Resource (SCR)
Peripherals
DMA
Audio Ports
Serial Interfaces
Display Internal Memory
GPIO
EDMA3
Control Timers
McASP
w/FIFO
(3)
I²C
SPI
UART
(2)
(2)
(3)
Connectivity
LCD
Ctlr
128KB
RAM
PRU
Subsystem
External Memory Interfaces
eHRPWM
(3)
eCAP
(3)
eQEP
(2)
USB2.0 USB1.1
OTG Ctlr OHCI Ctlr
PHY
PHY
(10/100)
EMAC MDIO
(RMII)
HPI
MMC/SD
(8b)
EMIFA(8b/16B)
EMIFB
NAND/Flash SDRAM Only
16b SDRAM
(16b/32b)
Note: Not all peripherals are available at the same time due to multiplexing.
Figure 1-1. OMAP-L137 Functional Block Diagram
4
OMAP-L137 Low-Power Applications Processor
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