OMAP-L137_15 Datasheet, PDF (182/222 Pages) Texas Instruments – OMAP-L137 Low-Power Applications Processor

OMAP-L137
SPRS563G – SEPTEMBER 2008 – REVISED JUNE 2014
www.ti.com
6.26 USB0 OTG (USB2.0 OTG)
The OMAP-L137 USB2.0 peripheral supports the following features:
• USB 2.0 peripheral at speeds high speed (HS: 480 Mb/s ) and full speed (FS: 12 Mb/s)
• USB 2.0 host at speeds HS, FS, and low speed (LS: 1.5 Mb/s)
• All transfer modes (control, bulk, interrupt, and isochronous)
• 4 Transmit (TX) and 4 Receive (RX) endpoints in addition to endpoint 0
• FIFO RAM
– 4K endpoint
– Programmable size
• Integrated USB 2.0 High Speed PHY
• Connects to a standard Charge Pump for VBUS 5 V generation
• RNDIS mode for accelerating RNDIS type protocols using short packet termination over USB
Important Notice: On the original device pinout (marked "A" in the lower right corner of the package),
pins USB0_VSSA33 (H4) and USB0_VSSA (F3) were connected to ground outside the package. For
more robust ESD performance, the USB0 ground references are now connected inside the package on
packages marked "B" and the package pins are unconnected. This change will require that any external
filter circuits previously referenced to ground at these pins will need to reference the board ground instead.
Important Notice: The USB0 controller module clock (PLL0_SYSCLK2) must be greater than 30 MHz for
proper operation of the USB controller. A clock rate of 60 MHz or greater is recommended to avoid data
throughput reduction.
Table 6-98 is the list of USB OTG registers.
BYTE ADDRESS
0x01E0 0000
0x01E0 0004
0x01E0 0008
0x01E0 000C
0x01E0 0010
0x01E0 0014
0x01E0 0018
0x01E0 001C
0x01E0 0020
0x01E0 0024
0x01E0 0028
0x01E0 002C
0x01E0 0030
0x01E0 0034
0x01E0 0038
0x01E0 003C
0x01E0 0040
0x01E0 0050
0x01E0 0054
0x01E0 0058
0x01E0 005C
0x01E0 0400
0x01E0 0401
0x01E0 0402
Table 6-98. Universal Serial Bus OTG (USB0) Registers
ACRONYM
REVID
CTRLR
STATR
EMUR
MODE
AUTOREQ
SRPFIXTIME
TEARDOWN
INTSRCR
INTSETR
INTCLRR
INTMSKR
INTMSKSETR
INTMSKCLRR
INTMASKEDR
EOIR
-
GENRNDISSZ1
GENRNDISSZ2
GENRNDISSZ3
GENRNDISSZ4
FADDR
POWER
INTRTX
REGISTER DESCRIPTION
Revision Register
Control Register
Status Register
Emulation Register
Mode Register
Autorequest Register
SRP Fix Time Register
Teardown Register
USB Interrupt Source Register
USB Interrupt Source Set Register
USB Interrupt Source Clear Register
USB Interrupt Mask Register
USB Interrupt Mask Set Register
USB Interrupt Mask Clear Register
USB Interrupt Source Masked Register
USB End of Interrupt Register
Reserved
Generic RNDIS Size EP1
Generic RNDIS Size EP2
Generic RNDIS Size EP3
Generic RNDIS Size EP4
Function Address Register
Power Management Register
Interrupt Register for Endpoint 0 plus Transmit Endpoints 1 to 4
182 Peripheral Information and Electrical Specifications
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