HPC3130A Datasheet, PDF (35/41 Pages) Texas Instruments – PCI HOT PLUG CONTROLLER

HPC3130A
PCI HOT PLUG CONTROLLER
SCPS055 – NOVEMBER 1999
PCI clock/reset timing requirements over recommended ranges of supply voltage and operating
free-air temperature
tc
twH
twL
dv/dt
tw
tsu
PARAMETER
PCLK cycle time
PCLK high time
PCLK low time
PCLK slew rate
RSTIN pulse width
PCLK active time at end of RSTIN
ALTERNATE
SYMBOL
tcyc
thigh
tlow
tr, _tf
trst
trst–clk
TEST CONDITIONS
MIN MAX UNITS
15
ns
6
ns
6
ns
1.5
4 V/ns
1
ms
100
ms
Pin definitions for 120-pin PBM package
PARAMETER
PCI
Slot
BUSON
Parallel
Parallel/serial
Miscellaneous
PIN NUMBER
14, 16, 18, 19, 20, 21, 25, 27
1, 2, 3, 4, 5, 7, 8, 9, 10, 52, 53, 54, 55, 57, 58, 59, 60, 64, 65, 66, 67, 69,
70, 71, 72, 73, 75, 76, 77, 78, 80, 82, 83, 84, 86, 87, 88, 91, 92, 93, 94,
96, 97, 98, 99, 102, 103, 104, 105, 106, 108, 109, 110, 111, 113, 114,
115, 116, 118, 120
63, 81, 100, 119
34, 35, 37, 38, 39, 40, 42
23, 24, 29, 30, 43, 44, 45, 47, 48, 49, 50
12, 13
Pin definitions for 128-pin PBK package
PARAMETER
PCI
Slot
BUSON
Parallel
Parallel/serial
Miscellaneous
PIN NUMBER
15, 17, 19, 20, 21, 22, 26, 28,
2, 3, 4, 5, 6, 8, 9, 10, 11, 55, 56, 57, 58, 60, 61, 62, 63, 69, 70, 71, 72,
74, 75, 76, 77, 78, 80, 81, 82, 83, 85, 87, 88, 89, 91, 92, 93, 98, 99, 100,
101, 103, 104, 105, 106, 109, 110, 111, 112, 113, 115, 116, 117, 118,
120, 121, 122, 123, 125, 127
68, 86, 107, 126
37, 38, 40, 41, 42, 43, 45,
24, 25, 30, 31, 46, 47, 48, 50, 51, 52, 53
13, 14
Pin definitions for 144-pin PGE package
PARAMETER
PCI
Slot
BUSON
Parallel
Parallel/serial
Miscellaneous
PIN NUMBER
17, 19, 21, 22, 23, 24, 28, 30
1, 3, 5, 7, 8, 10, 11, 12, 13, 61, 62, 63, 64, 66, 68, 70, 72, 79, 80, 81, 82,
84, 85, 86, 87, 88, 90, 91, 92, 93, 95, 97, 98, 99, 101, 102, 104, 109,
111, 113, 115, 117, 118, 119, 120, 123, 124, 125, 126, 127, 129, 130,
131, 132, 134, 135, 136, 137, 140, 144
77, 96, 121, 142
43, 44, 46, 47, 48, 49, 51
26, 27, 34, 36, 52, 53, 54, 56, 57, 58, 59
15, 16
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