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AM1705 Datasheet, PDF (35/155 Pages) Texas Instruments – AM1705 ARM Microprocessor
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6 Peripheral Information and Electrical Specifications
6.1 Parameter Information
6.1.1 Parameter Information Device-Specific Information
AM1705
SPRS657 – FEBRUARY 2010
Tester Pin Electronics
Data Sheet Timing Reference Point
42 Ω
4.0 pF
3.5 nH
1.85 pF
Transmission Line
Z0 = 50 Ω
(see note)
Output
Under
Test
Device Pin
(see note)
A. The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its
transmission line effects must be taken into account. A transmission line with a delay of 2 ns or longer can be used to
produce the desired transmission line effect. The transmission line is intended as a load only. It is not necessary to
add or subtract the transmission line delay (2 ns or longer) from the data sheet timings.
Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the
device pin and the input signals are driven between 0V and the appropriate IO supply rail for the signal.
Figure 6-1. Test Load Circuit for AC Timing Measurements
The load capacitance value stated is only for characterization and measurement of AC timing signals. This
load capacitance value does not indicate the maximum load the device is capable of driving.
6.1.1.1 Signal Transition Levels
All input and output timing parameters are referenced to Vref for both "0" and "1" logic levels. For 3.3 V I/O,
Vref = 1.65 V. For 1.8 V I/O, Vref = 0.9 V.
Vref
Figure 6-2. Input and Output Voltage Reference Levels for AC Timing Measurements
All rise and fall transition timing parameters are referenced to VIL MAX and VIH MIN for input clocks,
VOLMAX and VOH MIN for output clocks.
Vref = VIH MIN (or VOH MIN)
Vref = VIL MAX (or VOL MAX)
Figure 6-3. Rise and Fall Transition Time Voltage Reference Levels
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
35
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