AM1705 Datasheet, PDF (21/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
www.ti.com
SPRS657 – FEBRUARY 2010
Table 3-9. Enhanced Pulse Width Modulator (eHRPWM) Terminal Functions (continued)
SIGNAL NAME
AXR1[6]/EPWM2A/GP4[6]
AXR1[5]/EPWM2B/GP4[5]
AMUTE1/EPWMTZ/GP4[14]
PIN NO
PTP
TYPE ⁽¹⁾
eHRPWM2
170
I/O
171
I/O
132
I/O
PULL ⁽²⁾
MUXED
DESCRIPTION
IPD
McASP1, GPIO
IPD
eHRPWM2 A (with
high-resolution).
eHRPWM2 B
output.
IPD
McASP1,
eHRPWM0, GPIO,
eHRPWM2
eHRPWM2 trip zone
input.
3.6.8 Enhanced Quadrature Encoder Pulse Module (eQEP)
Table 3-10. Enhanced Quadrature Encoder Pulse Module (eQEP) Terminal Functions
SIGNAL NAME
PIN NO
PTP
TYPE⁽¹⁾ PULL⁽²⁾
MUXED
DESCRIPTION
eQEP0
SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
12
SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
9
I
IPU
SPIO, UART0,
eQEP0A quadrature
input.
I
GPIO, BOOT
IPU
eQEP0B quadrature
input.
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]
17
I
IPD
eQEP0 index.
SPI0, GPIO, BOOT
18
I
IPD
eQEP0 strobe.
eQEP1
AXR1[3]/EQEP1A/GP4[3]
AXR1[4]/EQEP1B/GP4[4]
174
I
IPD
eQEP1A quadrature
input.
McASP1, GPIO
173
I
IPD
eQEP1B quadrature
input.
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
11
I
IPD SPI0, GPIO, BOOT eQEP1 index.
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
16
I
IPD SPI1, GPIO, BOOT eQEP1 strobe.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
3.6.9 Boot
Table 3-11. Boot Terminal Functions⁽¹⁾
SIGNAL NAME
EMA_CS[2]/GP2[5]/BOOT[15]
EMA_WE/AXR0[12]/GP2[3]/BOOT[14]
EMA_D[7]/MMCSD_DAT[7]/GP0[7]/BOOT[13]
EMA_D[0]/MMCSD_DAT[0]/GP0[0]/BOOT[12]
PIN NO
PTP
23
TYPE ⁽²⁾
I
55
I
54
I
44
I
PULL ⁽³⁾
MUXED
IPU EMIFA, GPIO
IPU
EMIFA, McASP0,
GPIO
IPU _{EMIFA, MMC/SD,}
IPU ^GPIO
DESCRIPTION
BOOT[15].
BOOT[14].
BOOT[13].
BOOT[12].
(1) Boot decoding will be defined in the ROM datasheet.
(2) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(3) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
Copyright © 2010, Texas Instruments Incorporated
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