AM1705 Datasheet, PDF (18/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
SPRS657 – FEBRUARY 2010
www.ti.com
3.6.4 External Memory Interface B (only SDRAM )
Table 3-6. External Memory Interface B (EMIFB) Terminal Functions
SIGNAL NAME
PIN NO _TYPE(1)
PTP
PULL ⁽²⁾
MUXED
DESCRIPTION
EMB_D[15]/GP6[15]
74
I/O
IPD
EMB_D[14]/GP6[14]
76
I/O
IPD
EMB_D[13]/GP6[13]
78
I/O
IPD
EMB_D[12]/GP6[12]
79
I/O
IPD
EMB_D[11]/GP6[11]
80
I/O
IPD
EMB_D[10]/GP6[10]
82
I/O
IPD
EMB_D[9]/GP6[9]
83
I/O
IPD
EMB_D[8]/GP6[8]
EMB_D[7]/GP6[7]
84
I/O
62
I/O
IPD
GPIO
IPD
EMIFB SDRAM data bus.
EMB_D[6]/GP6[6]
63
I/O
IPD
EMB_D[5]/GP6[5]
64
I/O
IPD
EMB_D[4]/GP6[4]
66
I/O
IPD
EMB_D[3]/GP6[3]
68
I/O
IPD
EMB_D[2]/GP6[2]
70
I/O
IPD
EMB_D[1]/GP6[1]
72
I/O
IPD
EMB_D[0]/GP6[0]
73
I/O
IPD
EMB_A[12]/GP3[13]
89
O
IPD
EMB_A[11]/GP7[13]
91
O
IPD
EMB_A[10]/GP7[12]
105
O
IPD
EMB_A[9]/GP7[11]
EMB_A[8]/GP7[10]
92
O
94
O
IPD
GPIO
IPD
EMIFB SDRAM row/column
address bus.
EMB_A[7]/GP7[9]
95
O
IPD
EMB_A[6]/GP7[8]
96
O
IPD
EMB_A[5]/GP7[7]
97
O
IPD
EMB_A[4]/GP7[6]
98
O
IPD
EMB_A[3]/GP7[5]
EMB_A[2]/GP7[4]
EMB_A[1]/GP7[3]
100
O
101
O
102
O
IPD
IPD
IPD
GPIO
EMIFB SDRAM row/column
address.
EMB_A[0]/GP7[2]
103
O
IPD
EMB_BA[1]/GP7[0]
EMB_BA[0]/GP7[1]
106
O
IPU
107
O
IPU
EMIFB SDRAM bank address.
EMB_CLK
86
O
IPU
EMIF SDRAM clock.
EMB_SDCKE
88
I/O
IPU
EMIFB SDRAM clock enable.
EMB_WE
59
O
IPU
EMIFB write enable
EMB_RAS
110
O
IPU
EMIFB SDRAM row address
strobe.
EMB_CAS
57
O
IPU
EMIFB column address strobe.
EMB_CS[0]
108
O
IPU
EMIFB SDRAM chip select 0.
EMB_WE_DQM[1] /GP5[14]
EMB_WE_DQM[0] /GP5[15]
85
O
60
O
IPU
GPIO
IPU
EMIFB write enable/data mask
for EMB_D.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
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