AM1705 Datasheet, PDF (133/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
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SPRS657 – FEBRUARY 2010
Table 6-85. Universal Serial Bus OTG (USB0) Registers (continued)
BYTE ADDRESS
ACRONYM
REGISTER DESCRIPTION
CONTROL AND STATUS REGISTER FOR ENDPOINT 0
0x01E0 0502
PERI_CSR0
Control Status Register for Endpoint 0 in Peripheral Mode
HOST_CSR0
Control Status Register for Endpoint 0 in Host Mode
0x01E0 0508
COUNT0
Number of Received Bytes in Endpoint 0 FIFO
0x01E0 050A
HOST_TYPE0 Defines the Speed of Endpoint 0
0x01E0 050B HOST_NAKLIMIT0 Sets the NAK Response Timeout on Endpoint 0
0x01E0 050F
CONFIGDATA Returns details of core configuration.
CONTROL AND STATUS REGISTER FOR ENDPOINT 1
0x01E0 0510
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
0x01E0 0512
PERI_TXCSR Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
HOST_TXCSR Control Status Register for Host Transmit Endpoint (host mode)
0x01E0 0514
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
0x01E0 0516
PERI_RXCSR Control Status Register for Peripheral Receive Endpoint (peripheral mode)
HOST_RXCSR Control Status Register for Host Receive Endpoint (host mode)
0x01E0 0518
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
0x01E0 051A
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for the host
Transmit endpoint.
0x01E0 051B HOST_TXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk
transactions for host Transmit endpoint.
0x01E0 051C
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for the host
Receive endpoint.
0x01E0 051D HOST_RXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk
transactions for host Receive endpoint.
CONTROL AND STATUS REGISTER FOR ENDPOINT 2
0x01E0 0520
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
0x01E0 0522
PERI_TXCSR Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
HOST_TXCSR Control Status Register for Host Transmit Endpoint (host mode)
0x01E0 0524
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
0x01E0 0526
PERI_RXCSR Control Status Register for Peripheral Receive Endpoint (peripheral mode)
HOST_RXCSR Control Status Register for Host Receive Endpoint (host mode)
0x01E0 0528
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
0x01E0 052A
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for the host
Transmit endpoint.
0x01E0 052B HOST_TXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk
transactions for host Transmit endpoint.
0x01E0 052C
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for the host
Receive endpoint.
0x01E0 052D HOST_RXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk
transactions for host Receive endpoint.
CONTROL AND STATUS REGISTER FOR ENDPOINT 3
0x01E0 0530
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
0x01E0 0532
PERI_TXCSR Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
HOST_TXCSR Control Status Register for Host Transmit Endpoint (host mode)
0x01E0 0534
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
0x01E0 0536
PERI_RXCSR Control Status Register for Peripheral Receive Endpoint (peripheral mode)
HOST_RXCSR Control Status Register for Host Receive Endpoint (host mode)
0x01E0 0538
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
0x01E0 053A
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number for the host
Transmit endpoint.
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Peripheral Information and Electrical Specifications 133
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