AM1705 Datasheet, PDF (22/155 Pages) Texas Instruments – AM1705 ARM Microprocessor

AM1705
SPRS657 – FEBRUARY 2010
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Table 3-11. Boot Terminal Functions ⁽¹⁾ (continued)
SIGNAL NAME
AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11]
AFSX0/GP2[13]/BOOT[10]
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]
UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]
SPI1_CLK/EQEP1S/GP5[7]/BOOT[7]
SPI1_SIMO[0]/I2C1_SDA/GP5[6]/BOOT[6]
SPI1_SOMI[0]/I2C1_SCL/GP5[5]/BOOT[5]
SPI0_SCS[0]/UART0_RTS/EQEP0B/GP5[4]/BOOT[4]
SPI0_ENA/UART0_CTS/EQEP0A/GP5[3]/BOOT[3]
SPI0_CLK/EQEP1I/GP5[2]/BOOT[2]
SPI0_SIMO[0]/EQEP0S/GP5[1]/BOOT[1]
SPI0_SOMI[0]/EQEP0I/GP5[0]/BOOT[0]
PIN NO _TYPE(2)
PTP
129
I
127
I
3
I
2
I
16
I
14
I
13
I
9
I
12
I
11
I
18
I
17
I
PULL ⁽³⁾
MUXED
DESCRIPTION
IPD
McASP0, EMAC,
GPIO
BOOT[11].
IPD McASP0, GPIO
BOOT[10].
IPU
UART0, I2C0, Timer0,
GPIO
BOOT[9].
IPU
UART0, I2C0, Timer0,
GPIO
BOOT[8].
IPD SPI1, eQEP1, GPIO BOOT[7].
IPU
SPI1, I2C1, GPIO
IPU
BOOT[6].
BOOT[5].
IPU
SPI0, UART0,
eQEP0, GPIO
BOOT[4].
IPU
SPI0, UART0,
eQEP0, GPIO
BOOT[3].
IPD SPIO, eQEP1, GPIO BOOT[2].
IPD
BOOT[1].
SPI0, eQEP0, GPIO
IPD
BOOT[0].
3.6.10 Universal Asynchronous Receiver/Transmitters (UART0, UART1, UART2)
Table 3-12. Universal Asynchronous Receiver/Transmitter (UART) Terminal Functions
SIGNAL NAME
PIN NO
PTP
TYPE⁽¹⁾ PULL⁽²⁾
MUXED
DESCRIPTION
UART0
UART0_RXD/I2C0_SDA/TM64P0_IN12/GP5[8]/BOOT[8]
2
I
IPU
I2C0, BOOT,
Timer0, GPIO,
UART0 receive
data.
UART0_TXD/I2C0_SCL/TM64P0_OUT12/GP5[9]/BOOT[9]
3
O
IPU
I2C0, Timer0,
GPIO, BOOT
UART0 transmit
data.
UART0
SPI0_SCS[0]/ UART0_RTS /EQEP0B/GP5[4]/BOOT[4]
9
O
IPU
ready-to-send
SPIO, eQEP0,
output
GPIO, BOOT
SPI0_ENA/ UART0_CTS /EQEP0A/GP5[3]/BOOT[3]
12
I
IPU
UART0
clear-to-send input
UART1
UART1_RXD/AXR0[9]/GP3[9] ⁽³⁾
UART1_TXD/AXR0[10]/GP3[10] ⁽³⁾
122
I
IPD
UART1 receive
data.
McASP0, GPIO
123
O
IPD
UART1 transmit
data.
UART2
SPI1_ENA/UART2_RXD/GP5[12]
SPI1_SCS[0]/UART2_TXD/GP5[13]
7
I
IPU
UART2 receive
data.
SPI1, GPIO
8
O
IPU
UART2 transmit
data.
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
(3) As these signals are internally pulled down while the device is in reset, it is necessary to externally pull them high with resistors if
UART1 boot mode is used.
22
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