TMS320C6A8167 Datasheet, PDF (250/280 Pages) Texas Instruments – TMS320C6A816x Integra DSP+ARM Processors

TMS320C6A8168
TMS320C6A8167
SPRS680 – OCTOBER 2010
www.ti.com
8.17.1.2.4 Placement
Figure 8-55 shows the required placement for the processor as well as the DDR2 devices. The
dimensions for this figure are defined in Table 8-69. The placement does not restrict the side of the PCB
on which the devices are mounted. The ultimate purpose of the placement is to limit the maximum trace
lengths and allow for proper routing space. For a 16-bit DDR memory system, the high-word DDR2 device
is omitted from the placement.
Recommended DDR2 Device
X
Orientation
X¹
A1
A1
X¹
X¹
Y
OFFSET OFFSET
Figure 8-55. C6A816x Device and DDR2 Device Placement
Table 8-69. Placement Specifications
NO.
PARAMETER
1 X ^{(1) (2)} + Y ^{(1) (2)}
2 X^{' (1) (2)}
3 X^' Offset^{(1) (2) (3)}
4 DDR2 Keepout Region⁽⁴⁾
5 Clearance from non-DDR2 signal to DDR2 Keepout Region⁽⁵⁾
MIN
MAX UNIT
1660 Mils
1280 Mils
650 Mils
4
w
(1) For dimension definitions, see Figure 8-53.
(2) Measurements from center of processor to center of DDR2 device.
(3) For 16-bit memory systems, it is recommended that X^' offset be as small as possible.
(4) DDR2 keepout region to encompass entire DDR2 routing area.
(5) Non-DDR2 signals allowed within DDR2 keepout region provided they are separated from DDR2 routing layers by a ground plane.
250 Peripheral Information and Timings
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320C6A8168 TMS320C6A8167