OMAP5912 Datasheet, PDF (223/254 Pages) Texas Instruments – Applications Processor

Electrical Specifications
Table 5−17. McBSP Timing Requirements^†‡ (Continued)
NO.
MIN MAX UNIT
CLKX int^§
33.5
McBSP1
CLKX ext^§
1
Setup time, external transmit frame sync (FSX)
M19 t_{su(FXH-CKXL) high before CLKX low}
McBSP2
McBSP3
McBSP1
CLKX int
CLKX ext
CLKX int^§
CLKX ext^§
CLKX int^§
CLKX ext^§
25.25
ns
0
33.25
1
−1.5
7.5
Hold time, external transmit frame sync (FSX)
M20 t_{h(CKXL-FXH) high after CLKX low}
McBSP2
McBSP3
CLKR int
CLKR ext
CLKX int^§
CLKX ext^§
−1
ns
7.75
−1.25
9.25
† _{Polarity bits CLKRP = CLKXP = FSRP = FSXP = 0. If the polarity of any of the signals is inverted, the timing references of that signal are}
also inverted.
‡ _{P = 1/(DSPPER_CK or DSPXOR_CK) for McBSP 1 and 3, or 1/(ARMPER_CK clock frequency) in nanoseconds (ns) for McBSP 2.}
§ _{For McBSP1 and McBSP3, the receiver clock and frame sync inputs are driven by FSX and CLKX via internal loopback connections enabled}
via software configuration.
Table 5−18. McBSP Switching Characteristics^{†‡§}
NO.
PARAMETER
MIN MAX UNIT
Delay time, CLKS high to CLKR/X high for internal
M0 t_{d(CKSH-CKRXH) CLKR/X generated from CLKS input}
McBSP1 CLKR/X int
3.5 31.5 ns
M1 t_d(CKRX)
M2 t_d(CKRXH)
M3 t_d(CKRXL)
M4 t_d(CKRH-FRV)
Cycle time, CLKR/X
Pulse duration, CLKR/X high
Pulse duration, CLKR/X low
Delay time, CLKR high to internal FSR valid
CLKR/X int
2P
CLKR/X int 0.90D 1.10D ns
CLKR/X int 0.90C 1.10C ns
McBSP2
CLKR int
CLKR ext
−7.5 5.5
ns
3
24
McBSP1
CLKX int
CLKX ext
−8 7.5
3.5
32
M5 t_d(CKXH-FXV)
Delay time, CLKX high to internal FSX valid
McBSP2
CLKX int
CLKX ext
−6.5
3
7
ns
24
McBSP3
CLKX int
CLKX ext
−10.5 8.5
3.25 37.75
† _{Polarity bits CLKRP = CLKXP = FSRP = FSXP = 0. If the polarity of any of the signals is inverted, the timing references of that signal are also}
inverted.
‡ _{P = 1/(DSPPER_CK or DSPXOR_CK) for McBSP 1 and 3, or 1/(ARMPER_CK clock frequency) in nanoseconds (ns) for McBSP2.}
§ _{T = CLKRX period = (1 + CLKGDV) * P}
C = CLKRX low pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2) * P when CLKGDV is even
D = CLKRX high pulse width = T/2 when CLKGDV is odd or zero and = (CLKGDV/2 + 1) * P when CLKGDV is even
¶ _{Only DXENA = 0 is supported for all OMAP5912 McBSPs.}
December 2003 − Revised March 2005
SPRS231D 223