OMAP5912 Datasheet, PDF (155/254 Pages) Texas Instruments – Applications Processor

Functional Overview
3.3 DSP Memory Maps
The DSP supports a unified program/data memory map (program and data accesses are made to the same
physical space); however, peripheral registers are located in a separate I/O space which is accessed via the
DSP’s port instructions.
3.3.1 DSP Global Memory Map
The DSP Subsystem contains 160K bytes of on-chip SRAM (64K bytes of DARAM and 96K bytes of SARAM).
The MPU also has access to these memories via the MPUI (MPU Interface) port. The DSP also has access
to the shared system SRAM (250K bytes) and both EMIF spaces (EMIFF and EMIFS) via the DSP Memory
Management Unit (MMU) which is configured by the MPU.
Table 3−67 shows the high-level program/data memory map for the DSP subsystem. DSP data accesses
utilize 16-bit word addresses while DSP program fetches utilize byte addressing.
BYTE ADDRESS RANGE
Table 3−67. DSP Global Memory Map
WORD ADDRESS RANGE
INTERNAL MEMORY
EXTERNAL MEMORY^†
0x00 0000 − 0x00 FFFF
0x00 0000 − 0x00 7FFF
DARAM
64K bytes
0x01 0000 − 0x02 7FFF
0x00 8000 − 0x01 3FFF
SARAM
96K bytes
0x02 8000 − 0x04 FFFF
0x01 4000 − 0x02 7FFF
Reserved
0x05 0000 − 0xFF 7FFF
0x02 8000 − 0x7F BFFF
Managed by DSP MMU
0xFF 8000 − 0xFF FFFF
0x7F C000 − 0x7F FFFF
PDROM
(MPNMC = 0)
Managed by DSP MMU
(MPNMC =1)
† _{This space could be external memory or internal shared system memory, depending on the DSP MMU configuration.}
3.3.2 On-Chip Dual-Access RAM (DARAM)
The DARAM is located in the byte address range 000000h−00FFFFh and is composed of eight blocks of
8K bytes each (see Table 3−68). Each DARAM block can perform two accesses per cycle (two reads, two
writes, or a read and a write).
Table 3−68. DARAM Blocks
DSP BYTE ADDRESS RANGE
0x00 0000 − 0x00 1FFF
0x00 2000 − 0x00 3FFF
0x00 4000 − 0x00 5FFF
0x00 6000 − 0x00 7FFF
0x00 8000 − 0x00 9FFF
0x00 A000 − 0x00 BFFF
0x00 C000 − 0x00 DFFF
0x00 E000 − 0x00 FFFF
DSP WORD ADDRESS RANGE
0x00 0000 − 0x00 0FFF
0x00 1000 − 0x001FFF
0x00 2000 − 0x00 2FFF
0x00 3000 − 0x00 3FFF
0x00 4000 − 0x00 4FFF
0x00 5000 − 0x00 5FFF
0x00 6000 − 0x00 6FFF
0x00 7000 − 0x00 7FFF
MEMORY BLOCK
DARAM 0
DARAM 1
DARAM 2
DARAM 3
DARAM 4
DARAM 5
DARAM 6
DARAM 7
December 2003 − Revised March 2005
SPRS231D 155