TMS320DM6467_09 Datasheet, PDF (217/357 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6467
Digital Media System-on-Chip
SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009
7.10.2.6 Bulk Bypass Capacitors
Bulk bypass capacitors are required for moderate speed bypassing of the DDR2 and other circuitry.
Table 7-37 contains the minimum numbers and capacitance required for the bulk bypass capacitors. Note
that this table only covers the bypass needs of the DSP and DDR2 interfaces. Additional bulk bypass
capacitance may be needed for other circuitry.
Table 7-37. Bulk Bypass Capacitors
No. Parameter
1 DV_DD18 Bulk Bypass Capacitor Count⁽¹⁾
2 DV_DD18 Bulk Bypass Total Capacitance
3 DDR#1 Bulk Bypass Capacitor Count⁽¹⁾
4 DDR#1 Bulk Bypass Total Capacitance⁽¹⁾
5 DDR#2 Bulk Bypass Capacitor Count⁽²⁾
6 DDR#2 Bulk Bypass Total Capacitance⁽¹⁾⁽²⁾
Min
Max Unit
3
Devices
30
µF
1
Devices
10
µF
1
Devices
10
µF
(1) These devices should be placed near the device they are bypassing, but preference should be given to the placement of the high-speed
(HS) bypass caps.
(2) Only used on 32-bit wide DDR2 memory systems
7.10.2.7 High-Speed Bypass Capacitors
High-Speed (HS) bypass capacitors are critical for proper DDR2 interface operation. It is particularly
important to minimize the parasitic series inductance of the HS bypass cap, DSP/DDR power, and
DSP/DDR ground connections. Table 7-38 contains the specification for the HS bypass capacitors as well
as for the power connections on the PCB.
7.10.2.8 Net Classes
Table 7-39 lists the clock net classes for the DDR2 interface. Table 7-40 lists the signal net classes, and
associated clock net classes, for the signals in the DDR2 interface. These net classes are used for the
termination and routing rules that follow.
Table 7-38. High-Speed Bypass Capacitors
No. Parameter
1 HS Bypass Capacitor Package Size⁽¹⁾
2 Distance from HS bypass capacitor to device being bypassed
3 Number of connection vias for each HS bypass capacitor⁽²⁾
4 Trace length from bypass capacitor contact to connection via
5 Number of connection vias for each DSP device power or ground balls
6 Trace length from DSP device power ball to connection via
7 Number of connection vias for each DDR2 device power or ground balls
8 Trace length from DDR2 device power ball to connection via
9 DV_DD18 HS Bypass Capacitor Count⁽³⁾
10 DV_DD18 HS Bypass Capacitor Total Capacitance
11 DDR#1 HS Bypass Capacitor Count⁽³⁾
12 DDR#1 HS Bypass Capacitor Total Capacitance
13 DDR#2 HS Bypass Capacitor Count⁽³⁾⁽⁴⁾
14 DDR#2 HS Bypass Capacitor Total Capacitance⁽⁴⁾
Min
Max Unit
0402 10 Mils
250 Mils
2
Vias
1
30 Mils
1
Vias
35 Mils
1
Vias
35 Mils
20
Devices
1.2
µF
8
Devices
0.4
µF
8
Devices
0.4
µF
(1) LxW, 10 mil units, i.e., a 0402 is a 40x20 mil surface mount capacitor
(2) An additional HS bypass capacitor can share the connection vias only if it is mounted on the opposite side of the board.
(3) These devices should be placed as close as possible to the device being bypassed.
(4) Only used on 32-bit wide DDR2 memory systems
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Peripheral Information and Electrical Specifications 217