TMS320DM6467_09 Datasheet, PDF (143/357 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6467
Digital Media System-on-Chip
SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009
Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Temperature
(Unless Otherwise Noted) (continued)
PARAMETER
TEST CONDITIONS ⁽¹⁾
MIN
TYP
MAX UNIT
CV_DD = 1.2 V, DSP clock = 594 MHz
ARM Clock = 297 MHz, DDR Clock =
1318.58
mA
297 MHz
I_CDD
Core (CV_DD, DEV_CV_DD, AUX_CV_DD)
supply current⁽⁷⁾
CV_DD = 1.05 V, DSP clock = 594 MHz
ARM Clock = 297 MHz, DDR Clock =
297 MHz (SmartReflex V parts)
CV_DD = 1.2 V, DSP clock = 594 MHz
ARM Clock = 297 MHz, DDR Clock =
297 MHz (SmartReflex V parts)
814.00
mA
915.39
mA
CV_DD = 1.2 V, DSP clock = 729 MHz
ARM Clock = 364.5 MHz, DDR Clock =
1622.09
mA
310.5 MHz
I_DDD
3.3V I/O (DV_DD33, USB_V_DDA3P3) supply
current ⁽⁷⁾
DV_DD = 3.3 V, DSP clock = 594 MHz
ARM Clock = 297 MHz, DDR Clock =
297 MHz
DV_DD = 3.3 V, DSP clock = 729 MHz
ARM Clock = 364.5 MHz, DDR Clock =
310.5 MHz
25.32
mA
26.17
mA
DV_DD = 1.8 V, DSP clock = 594 MHz
ARM Clock = 297 MHz, DDR Clock =
255.15
mA
1.8V I/O (DV_DDR2, PLL1V_PRW18,
297 MHz
I_DDD
PLL2V_PRW18, DEV_DV_DD18, AUX_DV_DD18,
USB_V_DD1P8) supply current⁽⁷⁾
DV_DD = 1.8 V, DSP clock = 729 MHz
ARM Clock = 364.5 MHz, DDR Clock =
260.42
mA
310.5 MHz
C_I
Input capacitance
C_o
Output capacitance
4 pF
4 pF
(7) Measured under the following conditions: 60% DSP CPU utilization; ARM doing typical activity (peripheral configurations, other
housekeeping activities); DDR2 Memory Controller at 50% utilization, 50% writes, 32 bits, 50% bit switching at room temperature (25
°C). The actual current draw varies across manufacturing processes and is highly application-dependent. For more details on core and
I/O activity, as well as information relevant to board power supply design, see the TMS320DM646x Power Consumption Summary
Application Report (literature number SPRAAS2).
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Device Operating Conditions 143