TMS320DM6467_10 Datasheet, PDF (200/357 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467
Digital Media System-on-Chip
SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009
www.ti.com
7.8.2 DSP Interrupts
The C64x+ DSP interrupt controller combines device events into 12 prioritized interrupts. The source for
each of the 12 CPU interrupts is user-programmable and is listed in Table 7-26. Also, the interrupt
controller controls the generation of the CPU exception, NMI, and emulation interrupts. Table 7-27
summarizes the C64x+ interrupt controller registers and memory locations. For more details on DSP
interrupt control, see the TMS320DM646x DMSoC DSP Subsystem Reference Guide (literature number
SPRUEP8).
DSP
INTERRUPT
NUMBER
ACRONYM
0
EVT0
1
EVT1
2
EVT2
3
EVT3
4
TINTL0
5
TINTH0
6
TINTL1
7
TINTH1
8
–
9
EMU_DTDMA
10
–
11
EMU_RTDXRX
12
EMU_RTDXTX
13
IDMAINT0
14
IDMAINT1
15
–
16
ARM2DSP0
17
ARM2DSP1
18
ARM2DSP2
19
ARM2DSP3
20
–
21
–
22
–
23
–
24
–
25
–
26
–
27
–
28
–
29
–
30
–
31
–
32
–
33
–
34
–
35
–
36
–
Table 7-26. DM6467 DSP Interrupts
SOURCE
C64x+ Int Ctl 0
C64x+ Int Ctl 1
C64x+ Int Ctl 2
C64x+ Int Ctl 3
Timer 0 lower – TINT12
Timer 0 upper – TINT34
Timer 1 lower – TINT12
Timer 1 upper – TINT34
Reserved
C64x+ EMC
Reserved
C64x+ RTDX
C64x+ RTDX
C64x+ EMC 0
C64x+ EMC 1
Reserved
ARM to DSP Controller 0
ARM to DSP Controller 1
ARM to DSP Controller 2
ARM to DSP Controller 3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
DSP
INTERRUPT
NUMBER
ACRONYM
64
GPIO0
65
GPIO1
66
GPIO2
67
GPIO3
68
GPIO4
69
GPIO5
70
GPIO6
71
GPIO7
72
–
73
–
74
–
75
–
76
–
77
–
78
–
79
–
80
–
81
–
82
–
83
–
84
CCINT1
85
CCERRINT
86
TCERRINT0
87
TCERRINT1
88
TCERRINT2
89
TCERRINT3
90
IDEINT
91
–
92
–
93
–
94
–
95
–
96
INTERR
Reserved
97
EMC_IDMAERR
Reserved
Reserved
Reserved
98
–
99
–
100
–
SOURCE
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
EDMA CC Region 1
EDMA CC Error
EDMA TC0 Error
EDMA TC1 Error
EDMA TC2 Error
EDMA TC3 Error
ATA
Reserved
Reserved
Reserved
Reserved
Reserved
C64x+ Interrupt Controller
Dropped CPU Interrupt Event
C64x+ EMC Invalid IDMA
Parameters
Reserved
Reserved
Reserved
200 Peripheral Information and Electrical Specifications
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