TMS320DM6467_10 Datasheet, PDF (117/357 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6467
Digital Media System-on-Chip
SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009
4.7.3 Pin Multiplexing Details
This section discusses how to program each Pin Mux Register to select the desired peripheral functions
and pin muxing. See the individual pin mux sections for pin muxing details for a specific muxed pin.
For details on PINMUX0 and PINMUX1 registers, see Section 4.7.2, Pin Muxing Selection After Reset.
4.7.3.1 PCI, HPI, EMIFA, and ATA Pin Muxing
The PCI, HPI, EMIFA, and ATA signal muxing is determined by the value of the PCIEN, HPIEN, and
ATAEN bit fields in the PINMUX0 register. For more details on the actual pin functions, see Table 4-24
and Table 4-25.
PCIEN
0
0
0
0
1
Table 4-24. PCIEN, HPIEN, and ATAEN Encoding
HPIEN
0
0
1
1
x
ATAEN
0
1
0
1
x
PIN FUNCTIONS
EMIFA
EMIFA (NAND) and ATA
HPI (32-bit)
HPI (16-bit) and ATA
PCI ⁽¹⁾
(1) In PCI mode (PCIEN = 1), the internal pullups/pulldowns (IPUs/IPDs) are disabled on all PCI pins and
it is recommended to have external pullup resistors on the PCI_RSV[5:0] pins. See Table 4-25 for the
actual PCI pin functions and any associated footnotes.
1xx ⁽¹⁾
PCI_CLK
PCI_IDSEL
PCI_DEVSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_STOP
PCI_SERR
PCI_PERR
PCI_PAR
PCI_INTA
PCI_REQ
PCI_GNT
PCI_CBE3
PCI_CBE2
PCI_CBE1
PCI_CBE0
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
Table 4-25. PCI, HPI, EMIFA, and ATA Pin Muxing
PIN FUNCTIONS (WITH PCIEN, HPIEN, ATAEN VALUES)
010
011
000
GP[10]
GP[10]
GP[10]
–
HDDIR
EM_R/W
HCNTL1
HCNTL1
EM_BA[1]
HINT
HINT
EM_BA[0]
HRDY
HRDY
EM_A[17]
HHWIL
HHWIL
EM_A[16]
HCNTL0
HCNTL0
EM_WE
HDS1
HDS1
EM_OE
HCS
HCS
EM_DQM1
HAS
HAS
EM_DQM0
–
–
EM_WAIT2
GP[11]
DMARQ
EM_CS5
GP[12]
DACK
EM_CS4
HR/W
HR/W
EM_CS3
HDS2
HDS2
EM_CS2
GP[32]
ATA_CS1
EM_A[19]
GP[33]
ATA_CS0
EM_A[18]
HD31
DD15
EM_A[15]
HD30
DD14
EM_A[14]
HD29
DD13
EM_A[13]
HD28
DD12
EM_A[12]
HD27
DD11
EM_A[11]
HD26
DD10
EM_A[10]
001
GP[10]
HDDIR
EM_BA[1]
EM_BA[0]
EM_A[17]/(CLE)
EM_A[16]/(ALE)
EM_WE
EM_OE
EM_DQM1
EM_DQM0
EM_WAIT2/(RDY2/BSY2)
DMARQ
DACK
EM_CS3
EM_CS2
ATA_CS1
ATA_CS0
DD15
DD14
DD13
DD12
DD11
DD10
(1) In PCI mode (PCIEN = 1), the internal pullups/pulldowns (IPUs/IPDs) are disabled on all PCI pins and it is recommended to have
external pullup resistors on the PCI_RSV[5:0] pins. For more detailed information on external pullup/pulldown resistors, see
Section 4.8.1, Pullup/Pulldown Resistors.
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Device Configurations 117