TMS320DM6467_10 Datasheet, PDF (147/357 Pages) Texas Instruments – Digital Media System-on-Chip

www.ti.com
TMS320DM6467
Digital Media System-on-Chip
SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009
The DM6467 architecture is divided into the power and clock domains shown in Table 7-1. Table 7-2
further discusses the clock domains and their ratios. Figure 7-4 shows the Clock Domain Block Diagram.
Table 7-1. DM6467 Power and Clock Domains
POWER DOMAIN
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
Always On
CLOCK DOMAIN
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK2
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK3
SYSCLK4
SYSCLK3
SYSCLK1
SYSCLK2
PERIPHERAL/MODULE
UART0
UART1
UART2
I2C
Timer0
Timer1
Timer2
PWM0
PWM1
DDR2
VPIF
TSIF0
TSIF1
VDCE
HDVICP0
HDVICP1
EDMA3
PCI
SCR
GPSC
LPSCs
PLLC1
PLLC2
Ice Pick
EMIFA
USB
HPI
VLYNQ
EMAC/MDIO
SPI
McASP0
McASP1
CRGEN0
CRGEN1
ATA
GPIO
C64x+ CPU
ARM926
Submit Documentation Feedback
Peripheral Information and Electrical Specifications 147