AM1806 Datasheet, PDF (195/241 Pages) Texas Instruments – AM1806 ARM Microprocessor

www.ti.com
UHPI_HCS
AM1806
SPRS658 – FEBRUARY 2010
UHPI_HAS^(D)
1
UHPI_HCNTL[1:0]
1
UHPI_HR/W
1
UHPI_HHWIL
UHPI_HSTROBE^(A)(C)
2
2
2
3
2
1
2
1
2
1
4
3
UHPI_HD[15:0]
(output)
5
UHPI_HRDY^(B)
15
6
8
13
7
15
14
6
1st Half-Word
14
8
2nd Half-Word
A. UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(HDS1
XOR HDS2)] OR UHPI_HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing)and the state of the FIFO, transitions on UHPI_HRDY may or may not occur.
C. UHPI_HCS reflects typical UHPI_HCS behavior when UHPI_HSTROBE assertion is caused by UHPI_HDS1 or
UHPI_HDS2. UHPI_HCS timing requirements are reflected by parameters for UHPI_HSTROBE.
D The diagram above assumes UHPI_HAS has been pulled high.
Figure 6-57. UHPI Read Timing (HAS Not Used, Tied High)
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 195
Submit Documentation Feedback
Product Folder Link(s): AM1806