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AM1806 Datasheet, PDF (152/241 Pages) Texas Instruments – AM1806 ARM Microprocessor
AM1806
SPRS658 – FEBRUARY 2010
www.ti.com
Table 6-69. General Timing Requirements for SPI1 Master Modes (1) (continued)
NO.
PARAMETER
Polarity = 0, Phase =
0,
to SPI1_CLK falling
Polarity = 0, Phase =
Input Setup Time, 1,
SPI1_SOMI valid to SPI1_CLK rising
7 tsu(SOMI_SPC)M before
receive edge of
Polarity = 1, Phase =
SPI1_CLK
0,
to SPI1_CLK rising
Polarity = 1, Phase =
1,
to SPI1_CLK falling
Polarity = 0, Phase =
0,
from SPI1_CLK
falling
Polarity = 0, Phase =
1,
Input Hold Time, from SPI1_CLK
SPI1_SOMI valid rising
8 tih(SPC_SOMI)M after
receive edge of
Polarity = 1, Phase =
SPI1_CLK
0,
from SPI1_CLK
rising
Polarity = 1, Phase =
1,
from SPI1_CLK
falling
1.3V, 1.2V
MIN
MAX
1.5
1.5
1.5
1.5
4
4
4
4
1.1V
MIN
MAX
1.5
1.5
1.5
1.5
5
5
5
5
1.0V
MIN
MAX
1.5
1.5
1.5
1.5
6
6
6
6
UNIT
ns
ns
152 Peripheral Information and Electrical Specifications
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