TLK2541 Datasheet, PDF(16/26 Page) Texas Instruments

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TLK2541

SLLS779B â JANUARY 2008 â REVISED APRIL 2008...................................................................................................................................................... www.ti.com

8-bit/10-bit encoding contains a character called the comma (b0011111 or b1100000), which is used by the

comma detect circuit on the TLK2541 to align the received serial data back to its original byte boundary. The

decoder detects the comma, generating a synchronization signal aligning the data to their 10-bit boundaries for

decoding; the comma is mapped into the LSB. The decoder then converts the data back into 8-bit data. The

output from the two decoders is latched into the 16-bit register synchronized to the recovered parallel data clock

(RX_CLK) and output valid on the rising edge of the RX_CLK.

Since the TLK2541 must determine which byte of data belongs on the lower order byte of the parallel output bus,

the K code that contains a comma pattern is chosen to be output on the lower order byte. Protocols such as

Gigabit Ethernet or Fibre Channel are defined such that the K28.5 is only present on 20 or 40 bit boundaries.

NOTE:

The TLK2541 only achieves byte alignment on the 0011111 comma.

Decoding provides two additional status signals, RXD[16] and pin RXD[17]. When RXD[16] is high , an

8-bit/10-bit K code was received and the specific K code is presented on the data bits RXD[0:7]; otherwise, an

8-bit/10-bit D code was received. When RXD[17] is high, an 8-bit/10-bit K code was received and the specific

K-code is presented on data bits RXD[8:15]; otherwise, an 8-bit/10-bit D code was received (see Table 5). The

valid K codes the TLK2541 decodes are provided in Table 6. An error detected on either byte, including K codes

not in Table 6, causes that byte only to indicate a K0.0 code on the RXD[16] or RXD[17] and associated data

pins, where K0.0 is known to be an invalid 8-bit/10-bit code.

8B/10B Decode Bypass

When control pin RXCODE is held low, the TLK2541 will bypass the integrated 8B/10B decode logic and will

present the raw 20 bit deserialized data on the output pins RXD[0:19]. If RXCODE is high, then the deserialized

data will be decoded by the integrated 8B/10B decoder and the decoded data will be output on the output pins

RXD[0:19].

RX Rate Select

The TLK2541 receiver has two ranges of operation. The TLK2541 may be used to deserialize 20 bits of data at a

data rate of 20 times the reference clock, or the TLK2541 may be used to deserialize 10 bits of data at a rate of

10 times the reference clock. In either case, the reference clock must be in the range of 100 to 130 MHz,

allowing the TLK2541 to be used as a 10-bit deserializer at a rate of 1 to 1.3 Gbps or as a 20-bit deserializer at a

rate of 2 to 2.6 Gbps. The control pin RXRATE selects the range of operation for the TLK2541 deserializer. The

recovered byte clock is always in the range of 100 to 130 MHz. The data rate range for the TLK2541 receiver

may be selected independently of the TLK2541 transmitter. The TLK2541 may receive a data stream that is half

the rate of the transmitted data stream, or twice that of the transmitted data stream, or the same as the

transmitted data stream. At whatever data rate is chosen for the receiver, the Clock/Data Recovery (CDR)

function in the TLK2541 receiver may lock to and track an incoming data stream that is as much as Â± 200 ppm

away from the nominal data rate as referenced by the REFCLK to the TLK2541.

When RXRATE is low, the TLK2541 deserializes the data stream into a 10 bit data byte and output it on

RXD[0:9]. Bits RXD[10:19] are high-impedance. If the 8B/10B decoder is enabled, then the 10 bit deserialized

data is decoded and output on bits RXD[0:7], and bit RXD[16] indicates whether the code is a Dx.y code if

RXD[16] is low or a Kx.y code if RXD[16] is high. Bits RXD[8:15] and RXD[17:19] are high-impedance.

When RXRATE is high, the TLK2541 deserializes the data stream into a 20 bit data word and output it on bits

RXD[0:19]. Bit RXD[0] is the first bit received. If the 8B/10B decoders are enabled, then bits RXD[0:7] outputs the

lower order 10 bit deserialized code word and bits RXD[8:15] output the higher order 10 bit deserialized code

word. The lower order code word is the first byte received. Bit RXD[16] indicates whether the lower order code is

a Dx.y code if RXD[16] is low or a Kx.y code if RXD[16] is high. Bit RXD[17] indicates whether the higher order

code is a Dx.y code if RXD[17] is low or a Kx.y code if RXD[17] is high. Bits RXD[18] and RXD[19] are high

impedance.

When RXRATE is high, a K28.5 code such as that used in a Gigabit Ethernet IDLE or a FibreChannel ordered

set is output on the lower order byte. This is because at the higher data rate the parallel bus is two bytes wide,

and the receiver must determine which byte to output on the lower order byte of the receive parallel bus. The

TLK2541 receiver expects the K28.5 code to be present on the lower order byte and thus the receiver chooses a

20 bit deserialization boundary such that the K28.5 is present on the lower order byte.

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