THS8083A95 Datasheet, PDF (11/66 Pages) Texas Instruments – TRIPLE 8-BIT, 95MSPS, 3.3V VIDEO AND GRAPHICS

1.5 Abbreviations Used in This Document
PGA
PLL
I2C
EMI
NTSC
PAL
DTV
VBI
CS
Programmable gain amplifier
Phase-locked loop
Inter-IC interface
Electro-magnetic interference
National Television Systems Committee
Phase alternating line
Digital TV
Vertical blanking interval
Composite sync
1.6 Conventions
Throughout this document, the term YUV refers to a video/graphics signal, consisting of three components, of which
one component (Y) has its blanking level corresponding to the bottom level of the video signal range. The other two
components (U&V) have their blanking level at the mid-scale of the video signal range, because U&V are color
difference signals and thus, can go positive or negative with respect to blanking.
YUV, therefore, should not be restricted to NTSC/PAL component formats, but also includes baseband component
video formats used in DTV that should in a strict sense be denoted as analog YCbCr or YPbPr.
The term RGB refers to a video/graphics signal, consisting of three components, of which all components have their
blanking level corresponding to the bottom level of the video signal range. Therefore, it relates to both RGB PC
formats as well as red-green-blue video component signals, sometimes denoted as GBR instead of RGB in video
broadcast environments.
1.7 THS8083A95 Terminal Functions
TERMINAL
NAME
NO.
I/O/B† TYPE‡
DESCRIPTION
POWER SUPPLIES
AVSS_PLL
24
I
A Analog ground for PLL (XTL oscillator and analog PLL)
AVDD_PLL
25
I
A Analog supply (3.3 V) for analog PLL
DVSS_PLL
21
I
A Digital ground for digital PLL
DVDD_PLL
23
I
A Digital supply (3.3 V) for digital PLL
AVSS_CH1
84
I
A Analog ground for A/D channel 1
AVDD_CH1
85
I
A Analog supply (3.3 V) for A/D channel 1
AVSS_CH2_3
91
I
A Analog ground for A/D channel 2 and channel 3
AVDD_CH2_3
92
I
A Analog supply (3.3 V) for A/D channel 2 and channel 3
DVDD
18, 50, 57
I
A Digital supply for all logic, except digital PLL
DVSS
19, 58
I
A Digital ground for all logic, except digital PLL
VSS
51
I
A Substrate ground
AVDD_REF
75
I
A Analog supply (3.3 V) for voltage and current reference generator
AVSS_REF
74
I
A Analog ground (3.3 V) for voltage and current reference generator
† _{I = input to device: O = output from device B = bidirectional}
‡ _{A = analog pin: D = digital pin}
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