71M6531D_10 Datasheet, PDF (83/120 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Name
LCD_SEG33[3:0]
…
LCD_SEG35[3:0]
LCD_SEG37[3:0]
LCD_SEG39[3:0]
…
LCD_SEG41[3:0]
LCD_SEG48[7:4]
…
LCD_SEG49[7:4]
LCD_SEG63[7:4]
…
LCD_SEG66[7:4]
LCD_SEG71[7:4]
…
LCD_SEG73[7:4]
Location
2051[3:0]
…
2053[3:0]
2055[3:0]
2057[3:0]
…
2059[3:0]
2036[7:4]
…
2037[7:4]
2045[7:4]
…
2048[7:4]
204D[7:4]
…
204F[7:4]
LCD_Y
2021[6]
M26MHZ
M40MHZ
2005[4]
2005[0]
MPU_DIV[2:0] 2004[2:0]
Reset
0
…
0
0
0
…
0
0
…
0
0
…
0
0
…
0
Wake
L
…
L
L
L
…
L
L
…
L
L
…
L
L
…
L
0
L
0
0
0
0
0
0
Dir
R/W
…
R/W
R/W
R/W
…
R/W
R/W
…
R/W
R/W
…
R/W
R/W
…
R/W
R/W
R/W
R/W
R/W
Description
LCD Blink Frequency (ignored if blink is disabled or if the segment is off).
0 = 1 Hz (500 ms ON, 500 ms OFF)
1 = 0.5 Hz (1 s ON, 1 s OFF)
M26MHZ and M40MHZ set the master clock (MCK) frequency. These bits are reset on
chip reset and may only be set. Attempts to write zeroes to M40MHZ and M26MHZ.are
ignored.
The MPU clock divider (from MCK). These bits may be programmed by MPU without
risk of losing control.
MPU_DIV[2:0]
000
001
010
011
100
101
110
111
Resulting Clock Frequency
MCK/2²
MCK/2³
MCK/2⁴
MCK/2⁵
MCK/2⁶
MCK/2⁷
MCK/2⁸
MCK/2⁸
v1.3
© 2005-2010 TERIDIAN Semiconductor Corporation
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