71M6531D_10 Datasheet, PDF (81/120 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Name
IEN_WD_NROVF
IE_XFER
IE_RTC
Location
20B0[0]
SFR E8[0]
SFR E8[1]
IE_WAKE
SFR E8[5]
INTBITS
SFR F8[6:0]
LCD_BITMAP
[31:24]
2023
LCD_BITMAP
[39:32]
2024
LCD_BITMAP
[55:48]
2026
LCD_BITMAP
[63:56]
2027
LCD_BITMAP
[71:64]
2028
LCD_BLKMAP19
[3:0]
LCD_BLKMAP18
[3:0]
205A[7:4]
205A[3:0]
LCD_CLK[1:0] 2021[1:0]
Reset
0
0
0
Wake
0
0
0
0
–
–
–
0
L
0
L
0
L
0
L
0
L
0
L
0
L
Dir
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Active high watchdog near overflow interrupt enable.
Interrupt flags. These flags monitor the XFER_BUSY interrupt and the RTC_1SEC
interrupt. The flags are set by hardware and clear automatically.
Indicates that the MPU was awakened by the autowake timer. This bit is typically read
by the MPU on bootup. The firmware must write a zero to this bit to clear it.
Interrupt inputs. The MPU may read these bits to see the status of external interrupts
INT0, INT1 up to INT6. These bits do not have any memory and are primarily intended
for debug use.
Configuration for DIO11/SEG31 through DIO4/SEG24. Unused bits should be set to zero.
1 = LCD pin, 0 = DIO pin. Check Table 54 for bit availability.
Bitmap of DIO19/SEG39 through DIO12/SEG32. Unused bits should be set to zero.
1 = LCD pin, 0 = DIO pin. Check Table 54 for bit availability.
Bitmap of DIO28/SEG48 through DIO35/SEG55. Unused bits should be set to zero.
1 = LCD pin, 0 = DIO pin. Check Table 54 for bit availability.
Bitmap of DIO36/SEG56 through DIO43/SEG63. Unused bits should be set to zero.
1 = LCD pin, 0 = DIO pin. Check Table 54 for bit availability.
Bitmap of DIO44/SEG64 through DIO51/SEG71. Unused bits should be set to zero.
1 = LCD pin, 0 = DIO pin. Check Table 54 for bit availability.
Identifies which segments connected to SEG18 and SEG19 should blink. 1 means
blink. The most significant bit corresponds to COM3, the least significant bit to COM0.
Sets the LCD clock frequency for COM/SEG pins (not frame rate) according to the
following (f_w = 32768 Hz):
00 = f_w/2⁹
01 = f_w/2⁸
10 = f_w/2⁷
11 = f_w/2⁶
v1.3
© 2005-2010 TERIDIAN Semiconductor Corporation
81