W78E516DDG Datasheet, PDF (70/90 Pages) Nuvotem Talema – 8-BIT MICROCONTROLLER

W78E516D/W78E058D Data Sheet
Part 2: 4KB LDROM
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Procedure of Updating
the APROM
Timer Interrupt Service
Routine:
Stop Timer & disable interrupt
PGM
Is F04KBOOT Mode?
Yes
(CHPCON.7=1)
N
o
Reset the CHPCON Register:
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#03H
Yes
End of Programming ?
No
Setting Timer and enable
Timer interrupt for wake-up .
(150us for program operation)
Setting Timer and enable
Timer interrupt for wake-up .
(15ms for erasing operation)
Setting erase operation mode:
MOV SFRCN,#22H
(Erase 64KB APROM)
Start Timer and enter IDLE
Mode.
(Erasing...)
End of erase
operation. CPU will
be wakened by
Timer interrupt.
Get the parameters of new
code (Address and data bytes)
through I/O ports, UART or
other interfaces.
Software reset CPU and
re-boot from the 64KB
APROM.
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#83H
Setting control registers for
programming:
MOV SFRAH,#ADDRESS_H
MOV SFRAL,#ADDRESS_L
MOV SFRFD,#DATA
MOV SFRCN,#21H
END
Executing new code from
address 00H in the 64KB
APROM.
PGM
Note: Setting the CHPCON from 00H to 03H will clear the program counter (PC).
19 CONFIG BITS
During the on-chip Flash EPROM operation mode, the Flash EPROM can be programmed and veri-
fied repeatedly. Until the code inside the Flash EPROM is confirmed OK, the code can be protected.
The protection of Flash EPROM and those operations on it are described below.
The W78E516D/W78E058D has several Special Setting Registers, including the Security Register
and Company/Device ID Registers, which can not be accessed in programming mode. Those bits of
the Security Registers can not be changed once they have been programmed from high to low. They
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