W78E516DDG Datasheet, PDF (16/90 Pages) Nuvotem Talema – 8-BIT MICROCONTROLLER

W78E516D/W78E058D Data Sheet
8.2.1 Working Registers
There are four sets of working registers, each consisting of eight 8-bit registers. These are termed as
Banks 0, 1, 2, and 3. Individual registers within these banks can be directly accessed by separate in-
structions. These individual registers are named as R0, R1, R2, R3, R4, R5, R6 and R7. However, at
one time the W78E516D/W78E058D series can work with only one particular bank. The bank selec-
tion is done by setting RS1-RS0 bits in the PSW. The R0 and R1 registers are used to store the ad-
dress for indirect accessing.
8.2.2 Bit addressable Locations
The Scratch-pad RAM area from location 20h to 2Fh is byte as well as bit addressable. This means
that a bit in this area can be individually addressed. In addition some of the SFRs are also bit ad-
dressable. The instruction decoder is able to distinguish a bit access from a byte access by the type of
the instruction itself. In the SFR area, any existing SFR whose address ends in a 0 or 8 is bit address-
able.
8.2.3 Stack
The scratch-pad RAM can be used for the stack. This area is selected by the Stack Pointer (SP),
which stores the address of the top of the stack. Whenever a jump, call or interrupt is invoked the re-
turn address is placed on the stack. There is no restriction as to where the stack can begin in the
RAM. By default however, the Stack Pointer contains 07h at reset. The user can then change this to
any value desired. The SP will point to the last used value. Therefore, the SP will be incremented and
then address saved onto the stack. Conversely, while popping from the stack the contents will be read
first, and then the SP is decreased.
8.2.4 AUX-RAM
AUX-RAM 0H~255H is addressed indirectly as the same way to access external data memory with the
MOVX instruction. Address pointer are R0 and R1 of the selected register bank and DPTR register. A
access to external data memory locations higher than 255 will be performed with the MOVX instruction
in the same way as in the 8051. The AUX-RAM is disabled after power-on reset. Setting the bit 4 in
CHPCON register will enable the access to AUX-RAM.
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