W78E516DDG Datasheet, PDF (19/90 Pages) Nuvotem Talema – 8-BIT MICROCONTROLLER

W78E516D/W78E058D Data Sheet
TCON
Timer control
88H
PCON
P0UPR
P40AH
P40AL
DPH
DPL
SP
P0
Power control
87H
Port 0 pull up option register
86H
HI address comparator of P4.0 85H
LO address comparator of P4.0 84H
Data pointer high
83H
Data pointer low
82H
Stack pointer
81H
Port 0
80H
(8F)
(8E)
(8D)
(8C)
(8B)
(8A)
(89)
(88)
0000 0000B
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
SMOD SMOD0 -
POR
GF1
GF0
PD
IDL
00x1 0000B
P0UP 0000 0000B
0000 0000B
0000 0000B
0000 0000B
0000 0000B
0000 0111B
(87)
(86)
(85)
(84)
(83)
(82)
(81)
(80)
1111 1111B
[1]: When CPU in F04KBOOT mode (Ref. P65), CHPCON=1xx0 0000B, other mode the CHPCON=0xx0 0000B
9.1 SFR Detail Bit Descriptions
Port 0
Bit: 7
6
5
4
3
2
1
0
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
Mnemonic: P0
Address: 80h
BIT NAME FUNCTION
7-0 P0.[7:0] Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low order
address/data bus during accesses to external memory.
STACK POINTER
Bit: 7
6
5
4
3
2
1
0
SP.7
SP.6
SP.5
SP.4
SP.3
SP.2
SP.1
SP.0
Mnemonic: SP
Address: 81h
BIT NAME FUNCTION
7-0 SP.[7:0] The Stack Pointer stores the Scratch-pad RAM address where the stack begins. In other
words it always points to the top of the stack.
DATA POINTER LOW
Bit: 7
6
5
4
3
2
DPL.7
DPL.6
DPL.5
DPL.4
DPL.3
DPL.2
Mnemonic: DPL
BIT NAME
FUNCTION
7-0 DPL.[7:0]
This is the low byte of the standard 8052 16-bit data pointer.
1
0
DPL.1
DPL.0
Address: 82h
DATA POINTER HIGH
Bit: 7
6
5
4
3
2
1
0
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Publication Release Date: Feb 15, 2011
Revision A09