STE2002 Datasheet, PDF (39/51 Pages) STMicroelectronics – 81 X 128 SINGLE CHIP LCD CONTROLLER / DRIVER

STE2002
ELECTRICAL CHARACTERISTICS (continued)
DC OPERATION
(V_DD1 = 1.7 to 3.6 V; V_DD2 = 1.75 to 4.2V; V_ss1,2 = 0V; V_LCD = 4.5 to 11 V; T_amb =-40 to 85°C; unless otherwise specified)
Symbol
Parameter
Test Condition
Min. Typ. Max. Unit
Logic Inputs
V_IL Logic LOW voltage level
V_SS
0.3V_DD1 V
V_IH Logic HIGH Voltage Level
0.7V_DD1
V_DD2
V
I_in Input Current
V_in = V_SS1 or V_DD1
-1
1
µA
Logic Inputs/Outputs
V_IL Logic LOW voltage level
V_SS
0.3V_DD1 V
V_IH Logic HIGH Voltage Level
0.7V_DD1
V_DD1
V
+0.5V
Column and Row Driver
R_row ROW Output Resistance
V_LCD = 10V;
3K
5K kohm
R_col Column Output resistance
V_LCD = 10V;
5K
10K kohm
V_col Column Bias voltage accuracy No load
-50
+50
mV
V_row Row Bias voltage accuracy
-50
+50
mV
LCD Supply Voltage
V_LCD LCD Supply Voltage accuracy; V_DD = 2.8V; V_LCD = 10V; fsclk=0; -1.5
Internally generated
T_amb=25°C;
no display load; note 2, 3, 6 & 7;
VOP = 61h, PRS = 2hex
1.5
%
TC0 Temperature coefficient
-0.0·10^-3
1/°C
TC1
-0.35·10^-3
1/°C
TC2
-0.7·10^-3
1/°C
TC3
-1.05·10^-3
1/°C
TC4
-1.4 ·10^-3
1/°C
TC5
-1.75·10^-3
1/°C
TC6
-2.1·10^-3
1/°C
TC7
-2.3·10^-3
1/°C
Notes: 1. The maximum possible V_LCD voltage that can be generated is dependent on voltage, temperature and (display) load.
2. Internal clock
3. When fsclk = 0 there is no interface clock.
4. Power-down mode. During power-down all static currents are switched-off.
5. f external VLCD, the display load current is not transmitted to IDD
6. Tolerance depends on the temperature; (typically zero at T_amb = 27°C), maximum tolerance values are measured at the temper-
ature range limit.
7. For TC0 to TC7
8. Data Byte Writing Mode
9.V_DD1 ≤ V_DD2
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