H3LIS100DL Datasheet, PDF (33/38 Pages) STMicroelectronics – 8-bit data output

H3LIS100DL
Register description
D6 - D0
Table 45. INT1_DURATION description
Duration value. Default value: 000 0000
The D6 - D0 bits set the minimum duration of the interrupt 1 event to be recognized.
Duration steps and maximum values depend on the ODR chosen.
7.17
INT2_CFG (34h)
Table 46. INT2_CFG register
AOI
0
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
AOI
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
Table 47. INT2_CFG description
AND/OR combination of interrupt events. Default value: 0.
(See Table 48)
Enable interrupt generation on Z high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
Enable interrupt generation on Z low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
Enable interrupt generation on Y high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
Enable interrupt generation on Y low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
Enable interrupt generation on X high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
Enable interrupt generation on X low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
Configuration register for interrupt 2 source.
Table 48. Interrupt mode configuration
AOI
Interrupt mode
0
OR combination of interrupt events
1
AND combination of interrupt events
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