H3LIS100DL Datasheet, PDF (27/38 Pages) STMicroelectronics – 8-bit data output

H3LIS100DL
Register description
The BOOT bit is used to refresh the content of the internal registers stored in the Flash
memory block. At device power-up, the content of the Flash memory block is transferred to
the internal registers related to trimming functions in order to permit correct operation of the
device itself. If for any reason the content of the trimming registers is changed, it is sufficient
to use this bit to restore the correct values. When the BOOT bit is set to ‘1’, the content of
the internal Flash is copied inside the corresponding internal registers and it is used to
calibrate the device. These values are factory trimmed and they are different for every
accelerometer. They permit correct operation of the device and normally they do not have to
be changed. At the end of the boot process the BOOT bit is set again to ‘0’.
HPM1
0
0
1
Table 23. High-pass filter mode configuration
HPM0
High-pass filter mode
0
Normal mode (reset by reading HP_RESET_FILTER)
1
Reference signal for filtering
0
Normal mode (reset by reading HP_RESET_FILTER)
HPCF[1:0]. These bits are used to configure the high-pass filter cutoff frequency f_t which is
given by:
f_t
=
ln


1
–
H^-----1P-----c^{-}
 ₂--^f--^s_--
The equation can be simplified to the following approximated equation:
f_t = ₆-----_---^fH--^s---_P----_c--
Table 24. High-pass filter cutoff frequency configuration
HPcoeff2,1
f_t [Hz]
Data rate = 50 Hz
f_t [Hz]
Data rate = 100 Hz
f_t [Hz]
Data rate = 400 Hz
00
1
2
8
01
0.5
1
4
10
0.25
0.5
2
11
0.125
0.25
1
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